PSB4596V3.1 Просмотр технического описания (PDF) - Siemens AG

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PSB4596V3.1

Analog Line Interface Solution ALIS V3

Siemens AG 

3

Pin Configuration and Definitions

3.1 Pin Configuration

PSB 4595 / PSB 4596

Analog Line Interface Solution

Pin Configuration and Definitions

CAP1 1

CAP2 2

VREF 3

TIP 4

TIP AC 5

RING 6

RING AC 7

SO 0 8

SO 1Q 9

CAP B22 10

CAP B21 11

CAP A22 12

24 GNDA

23 T1G

22 VDDA

21 VDD_SENS

20

NC

19

T2G

18

SI 0

17

SI 1

16

TEST

15

CAP C21

14

13

CAP A21

Figure 2 Pin Configuration of PSB 4595 (Top View)

CAP_A12 1

CAP_B11 2

CAP_B12 3

ID_Ain 4

ID_Bin 5

SLEEP 6

BM 7

GPIO 8

BUZZER 9

SCI_CS / SWAP 10

SCI_CLK / MODE 11

SCI_IN 12

SCI_OUT 13

INT 14

28 CAP_A11

27 CAP_C12

26 CAP_C11

25 VDD

24

GND

23

RESET

22

GPO

21

MCLK1

20

MCLK2

19

FSC2

18

DAT_CLK

17

DAT_IN

16

DAT_OUT

15

FSC

Figure 3 Pin Configuration of PSB 4596 (Top View)

Semiconductor Group

9

Product Overview 06.98

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