L9805E Просмотр технического описания (PDF) - STMicroelectronics
Номер в каталоге
Компоненты Описание
Список матч
L9805E Datasheet PDF : 127 Pages
| |||
Central Processing Unit
2
Central Processing Unit
L9805E
2.1
Introduction
The CPU has a full 8-bit architecture. Six internal registers allow efficient 8-bit data
manipulation. The CPU is capable of executing 63 basic instructions and features 17 main
addressing modes.
2.2
CPU registers
The 6 CPU registers are shown in the programming model in Figure 3. Following an
interrupt, all registers except Y are pushed onto the stack in the order shown in Figure 4.
They are popped from stack in the reverse order.
The Y register is not affected by these automatic procedures. The interrupt routine must
therefore handle Y, if needed, through the PUSH and POP instructions.
Accumulator (A). The Accumulator is an 8-bit general purpose register used to hold
operands and the results of the arithmetic and logic calculations as well as data
manipulations.
Index Registers (X and Y). These 8-bit registers are used to create effective addresses or
as temporary storage areas for data manipulation. The Cross-Assembler generates a
PRECEDE instruction (PRE) to indicate that the following instruction refers to the Y register.
Program Counter (PC). The program counter is a 16-bit register containing the address of
the next instruction to be executed by the CPU.
Figure 3.
Organization of Internal CPU Registers
7
0
ACCUMULATOR:
RESET VALUE:
XXXXXXXX
7
0
X INDEX REGISTER:
RESET VALUE:
XXXXXXXX
7
0
Y INDEX REGISTER:
PROGRAM COUNTER:
STACK POINTER:
RESET VALUE:
XXXXXXXX
15
7
0
RESET VALUE = RESET VECTOR @ FFFEh-FFFFh
15
7
0
00000001
RESET VALUE =0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1
CONDITION CODE REGISTER:
X = Undefined
7
0
1 1 1 HI NZ C
RESET VALUE:
1 1 1 X1 XXX
16/127
Share Link: 