WRITE CYCLE NO. 2 (WE CONTROLLED)(13,14)
P4C1981/1981L, P4C1982/1982L
1520 08
WRITE CYCLE NO. 3 (CE1, CE2 CONTROLLED)(11,12)
Notes:
12. CE (CE1, CE2) and WE must be LOW for WRITE cycle.
13. OE is LOW for WRITE cycle.
14. If CE1 or CE2 goes HIGH simultaneously with WE HIGH, the
output remains in a high impedance state.
15. Write Cycle Time is measured from the last valid address to the
first transitioning address.
Document # SRAM114 REV B
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