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WT21-A-HCI Просмотр технического описания (PDF) - Unspecified

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WT21-A-HCI
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WT21-A-HCI Datasheet PDF : 57 Pages
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7
CSR Serial Peripheral Interface (CSPI)
The CSPI is a host interface which shares pins with the SDIO. It has been defined by CSR with
the intention of producing a very simple interface. This has two advantages:
It allows maximum compatibility with the possible host drivers
It minimizes the host software effort needed to form that data to be sent (e.g., by
removing the need to calculate CRCs)
This host interface allows an external host to control the Bluecore, using a CSR defined protocol
built upon a 4-wire SPI bus.
Note:
The CSPI is entirely separated from the debug Serial Peripheral Interface
The CSPI allows access to the following:
Function 0 registers
Bluetooth Acceleration Registers
MCU IO Registers
Bluetooth MMU port
The CSPI is a third protocol available for the host to transfer data into the Bluecore and shares
pins with the other SDIO protocols.
MMU buffers are accessed using burst read/writes. The command and address fields are used to
select the correct buffer. The CSPI is able to generate an interrupt to the host when a memory
access fails. This interrupt line is shared with the SDIO functions.
Table 12 shows the mapping of SDIO pins onto the CSPI functions when CSPI is enabled.
Table 12: SDIO Mapping to CSPI Functions
The CSPI Interface is an extension of the basic SPI Interface, with the access type determined
by the following fields:
MMU
8-bit command
24-bit address
16-bit burst length (optional). Only applicable for burst transfers into or out of the
7.1.1 CSPI Read/Write Cycles
Register read/write cycles are used to access Function 0, Bluetooth acceleration and MCU
registers.
Burst read/write cycles are used to access the MMU.
Bluegiga Technologies Oy
Page 23 of 56

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