CY62146V18 Просмотр технического описания (PDF) - Cypress Semiconductor
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CY62146V18 Datasheet PDF : 10 Pages
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CY62146V18 MoBL2™
Features
• Low voltage range:
— CY62146V18: 1.75V–1.95V
• Ultra-low active, standby power
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CMOS for optimum speed/power
Functional Description
The CY62146V18 is a high-performance CMOS static RAM
organized as 262,144 words by 16 bits. These devices feature
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life™ (MoBL™) in por-
table applications such as cellular telephones. The device also
has an automatic power-down feature that significantly reduc-
es power consumption by 99% when addresses are not tog-
gling. The device can also be put into standby mode when
deselected (CE HIGH). The input/output pins (I/O0 through
Logic Block Diagram
256K x 16 Static RAM
I/O15) are placed in a high-impedance state when deselected
(CE HIGH), outputs are disabled (OE HIGH), BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is
written into the location specified on the address pins (A0
through A16). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O8 through I/O15) is written into the location
specified on the address pins (A0 through A17).
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW,
then data from memory will appear on I/O8 to I/O15. See the
truth table at the back of this data sheet for a complete descrip-
tion of read and write modes.
The CY62146V18 is available in 48-Ball FBGA packaging.
DATA IN DRIVERS
A9
A8
A7
A6
A5
256K x 16
A4
RAM Array
A3
2048 x 2048
A2
A1
A0
COLUMN DECODER
I/O0–I/O7
I/O8–I/O15
BHE
WE
CE
OE
BLE
MoBL2 and More Battery Life are trademarks of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
September 6, 2000
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