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IDT74CBTLV16210PAG

LOW-VOLTAGE 20-BIT BUS SWITCH

Integrated Device Technology 

IDT74CBTLV16210

LOW-VOLTAGE 20-BIT BUS SWITCH

TEST CIRCUITS AND WAVEFORMS

TEST CONDITIONS

Symbol VCC(1)= 3.3V±0.3V

VCC(2)= 2.5V±0.2V

Unit

VLOAD

2 x Vcc

2 x Vcc

V

VIH

3

Vcc

V

VT

1.5

Vcc / 2

V

VLZ

300

150

mV

VHZ

300

150

mV

CL

50

30

pF

INDUSTRIAL TEMPERATURE RANGE

SAME PHASE

INPUT TRANSITION

tPLH

tPHL

OUTPUT

tPLH

tPHL

OPPOSITE PHASE

INPUT TRANSITION

Propagation Delay

VIH

VT

0V

VOH

VT

VOL

VIH

VT

0V

Pulse(1, 2)

VIN

Generator

VCC

VOUT

D.U.T.

500Ω

VLOAD

Open

GND

RT

500Ω

CL

Test Circuits for All Outputs

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

NOTES:

1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.

CONTROL

INPUT

ENABLE

tPZL

DISABLE VIH

VT

tPLZ

0V

OUTPUT

NORMALLY

SWITCH

CLOSED

LOW

tPZH

OUTPUT SWITCH

NORMALLY OPEN

HIGH

VLOAD/2

VT

tPHZ

VT

0V

VLOAD/2

VOL + VLZ

VOL

VOH

VOH -VHZ

0V

NOTE:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

Enable and Disable Times

SWITCH POSITION

Test

tPLZ/tPZL

tPHZ/tPZH

tPD

Switch

VLOAD

GND

Open

4

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