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AQW216A Просмотр технического описания (PDF) - Panasonic Corporation

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AQW216A Datasheet PDF : 15 Pages
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Reverse voltages at the input (for TSON)
If reverse voltages are present at the input terminals, for example,
connect a schottky barrier diode in reverse parallel across the input
terminals and keep the reverse voltages below the reverse
breakdown voltage. Typical circuit is shown below.
1
4
2
3
Continual DC bias (AQV259 and AQV258)
If a continual DC bias will be applied between the input and output,
the breakdown voltage of the switching element MOSFET on the
output side may degrade. Therefore, be sure to test the product
under actual conditions. Example of circuits that will cause
degradation of breakdown voltage of MOSFET is given below.
1
E
IF 2
3
6
5
IL
4
Load
Cleaning solvents compatibility
Cleaning the solder flux should use the immersion washing with an
organic solvent. If you have to use ultrasonic cleaning, please adopt
the following conditions and check that there are no problems in the
actual usage.
• Frequency: 27 to 29kHz
• Ultrasonic output: No greater than 0.25W/cm2*
• Cleaning time: 30s or less
• Cleanser used: Asahiklin AK-225
• Others: Float PCB and the device in the cleaning solvent to
prevent from contacting the ultrasonic vibrator
* Applies to unit area ultrasonic output for ultrasonic baths
Notes for mounting
1) When different kinds of packages are mounted on PC boad,
temperature rise at soldering lead is highly dependent on
package size. Therefore, please set the lower temperature
soldering condition than the conditions of item “Soldering”, and
confirm the temperature condition of actual usage before
soldering.
2) When soldering condition exceeds our recommendation, the
PhotoMOS® characteristics may be adversely affected. It may
occur package crack or bonding wire breaking because of
thermal expansion unconformity and resin strength reduction.
Please contact our sales office about the propriety of the
condition.
3) Please confirm the heat stress by using actual board because it
may be changed by board condition or manufacturing process
condition.
4) Solder creepage, wettability, or soldering strength will be affected
by the soldering condition or used soldering type. Please check
them under the actual production condition in detail.
5) Please apply coating when the device returns to a room
temperature.
PhotoMOS® Cautions for Use
Input wiring pattern
1) With AQY* or AQW* series avoid installing the input (LED side)
wiring pattern to the bottom side of the package if you require the
specified I/O isolation voltage (Viso) after mounting the PC board.
Since part of the frame on the output side is exposed, it may
cause fluctuations in the I/O isolation voltage.
Portion of output side frame
(Output terminal side)
Input wiring
pattern (Input terminal side)
May not allow the prescribed I/O withstand
voltage (Viso) to be achieved
* Excluding reinforced insulation products and SSOP, SON, and TSON packages
2) Exposed terminals are electrically connected to internal elements.
Be aware that contact with external circuits may cause
deterioration of insulation between input and output, leading to
destruction of internal elements.
3) If installed in proximity to other device, take care to avoid short
circuits between device, which may occur if exposed frames of
adjacent device come too close.
ー9ー
Panasonic Corporation 2020
ASCTB65E 202002

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