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HMC520A(RevA) Просмотр технического описания (PDF) - Analog Devices

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HMC520A
(Rev.:RevA)
ADI
Analog Devices ADI
HMC520A Datasheet PDF : 32 Pages
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HMC520A
Data Sheet
SOLDERING INFORMATION AND RECOMMENDED
LAND PATTERN
Figure 105 shows the recommended land pattern forthe
HMC520A. The HMC520A is contained in a 24-terminal
ceramic LCC package, which has an exposed ground pad.
This pad is internally connected to the ground of the chip.
To minimize thermal impedance and ensure electrical
performance, solder the pad to the low impedance ground
plane on the PCB. To further reduce thermal impedance, stitch
the ground planes together on all layersunder the padwith vias.
The land pattern on the EV1HMC520ALC4 evaluation board
provides a simulated thermal resistance (θJC) of 225°C/W.
SOLDERMASK
GROUND PAD
.178" SQUARE
.004" MASK/METAL OVERLAP
.010" MIN MASK WIDTH
PIN 1
PAD SIZE
.026" × .010"
.0197"
[0.50]
.116"
MASK
OPENING
.034"
TYPICAL
VIA
SPACING
.010" REF
.030"
MASK OPENING
ᶲ .010"
TYPICAL VIA
.106" SQUARE
GROUND PAD
.098" SQUARE MASK OPENING
.020 × 45" CHAMFER FOR PIN 1
Figure 105. Evaluation Board Land Pattern
Rev. A | Page 30 of 32

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