MWCT1001AVLH Просмотр технического описания (PDF) - NXP Semiconductors.

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MWCT1001AVLH

MWCT1xxx Reference Manual

NXP Semiconductors. 

Section number

Title

Page

11.2.42 Software Control Register 6 (SIM_SCR7).................................................................................................... 198

11.3 Functional Description..................................................................................................................................................199

11.3.1 Clock Generation Overview...........................................................................................................................199

11.3.2 Power-Down Modes Overview......................................................................................................................200

11.3.3 STOP and WAIT Mode Disable Function..................................................................................................... 201

11.4 Resets............................................................................................................................................................................ 202

11.5 Clocks........................................................................................................................................................................... 202

11.6 Interrupts....................................................................................................................................................................... 202

Chapter 12

Interrupt Controller (INTC)

12.1 Introduction...................................................................................................................................................................203

12.1.1 References...................................................................................................................................................... 203

12.1.2 Features.......................................................................................................................................................... 203

12.1.3 Modes of Operation....................................................................................................................................... 203

12.1.4 Block Diagram............................................................................................................................................... 204

12.2 Memory Map and Registers..........................................................................................................................................205

12.2.1 Interrupt Priority Register 0 (INTC_IPR0).................................................................................................... 206

12.2.2 Interrupt Priority Register 1 (INTC_IPR1).................................................................................................... 207

12.2.3 Interrupt Priority Register 2 (INTC_IPR2).................................................................................................... 208

12.2.4 Interrupt Priority Register 3 (INTC_IPR3).................................................................................................... 210

12.2.5 Interrupt Priority Register 4 (INTC_IPR4).................................................................................................... 211

12.2.6 Interrupt Priority Register 5 (INTC_IPR5).................................................................................................... 212

12.2.7 Interrupt Priority Register 6 (INTC_IPR6).................................................................................................... 213

12.2.8 Interrupt Priority Register 8 (INTC_IPR8).................................................................................................... 215

12.2.9 Interrupt Priority Register 9 (INTC_IPR9).................................................................................................... 216

12.2.10 Interrupt Priority Register 10 (INTC_IPR10)................................................................................................ 217

12.2.11 Interrupt Priority Register 11 (INTC_IPR11)................................................................................................ 219

12.2.12 Interrupt Priority Register 12 (INTC_IPR12)................................................................................................ 220

12.2.13 Vector Base Address Register (INTC_VBA)................................................................................................ 221

MWCT1xxx Reference Manual, Rev. 3.1, 09/2016

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NXP Semiconductors

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