CY8C27143-24PI Просмотр технического описания (PDF) - Cypress Semiconductor
Номер в каталоге
Компоненты Описание
производитель
CY8C27143-24PI Datasheet PDF : 53 Pages
| |||
CY8C27143, CY8C27243
CY8C27443, CY8C27543, CY8C27643
28-Pin Part Pinout
Table 5. Pin Definitions - 28-Pin PDIP, SSOP, SOIC
Type
Pin No.
Digital Analog
1
IO
I
2
IO
IO
3
IO
IO
4
IO
I
5
IO
6
IO
7
IO
I
8
IO
I
9
Power
10
IO
11
IO
12
IO
13
IO
14
Power
15
IO
16
IO
17
IO
18
IO
19
Input
20
IO
I
21
IO
I
22
IO
23
IO
24
IO
I
25
IO
IO
26
IO
IO
27
IO
I
28
Power
Pin
Name
P0[7]
P0[5]
P0[3]
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
SMP
P1[7]
P1[5]
P1[3]
P1[1]
Vss
P1[0]
P1[2]
P1[4]
P1[6]
XRES
P2[0]
P2[2]
P2[4]
P2[6]
P0[0]
P0[2]
P0[4]
P0[6]
Vdd
Description
Analog column mux input.
Analog column mux input and column output.
Analog column mux input and column output.
Analog column mux input.
Direct switched capacitor block input.
Direct switched capacitor block input.
Switch Mode Pump (SMP) connection to external
components required.
I2C Serial Clock (SCL).
I2C Serial Data (SDA).
Crystal Input (XTALin), I2C Serial Clock (SCL),
ISSP-SCLK*.
Ground connection.
Crystal Output (XTALout), I2C Serial Data (SDA),
ISSP-SDATA*.
Optional External Clock Input (EXTCLK).
Active high external reset with internal pull down.
Direct switched capacitor block input.
Direct switched capacitor block input.
External Analog Ground (AGND).
External Voltage Reference (VRef).
Analog column mux input.
Analog column mux input and column output.
Analog column mux input and column output.
Analog column mux input.
Supply voltage.
Figure 5. CY8C27443 28-Pin PSoC Device
A, I,P0[7] 1
A,IO, P0[5] 2
A,IO, P0[3] 3
A,I, P0[1] 4
P2[7] 5
P2[5] 6
A,I, P2[3] 7
A, I,P2[1] 8
SMP 9
I2CSCL,P1[7] 10
I2CSDA,P1[5] 11
P1[3] 12
I2CSCL,XTALin,P1[1] 13
Vss 14
28
27
26
25
24
PDIP 23
SSOP 22
SOIC
21
20
19
18
17
16
15
Vdd
P0[6], A,I
P0[4], A,IO
P0[2], A,IO
P0[0], A,I
P2 [6],Ex te rna lVRe f
P2 [4],Ex te rna lAGND
P2[2], A,I
P2[0], A,I
XRES
P1[6]
P1[4],EXTCLK
P1[2]
P1[0],XTALout,I2CSDA
LEGEND: A = Analog, I = Input, and O = Output.
* These are the ISSP pins, which are not High Z at POR (Power On Reset). See the PSoC Programma-
ble System-on-Chip Technical Reference Manual for details.
Document Number: 38-12012 Rev. *M
Page 9 of 53
[+] Feedback
Share Link: 