CY8C27143-24PI Просмотр технического описания (PDF) - Cypress Semiconductor
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CY8C27143-24PI Datasheet PDF : 53 Pages
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CY8C27143, CY8C27243
CY8C27443, CY8C27543, CY8C27643
44-Pin Part Pinout
Table 6. Pin Definitions - 44-Pin TQFP
Pin
No.
Type
Digital Analog Pin Name
Description
Figure 6. CY8C27543 44-Pin PSoC Device
1
IO
P2[5]
2
IO
I
P2[3] Direct switched capacitor block input.
3
IO
I
P2[1] Direct switched capacitor block input.
4
IO
P4[7]
5
IO
P4[5]
6
IO
7
IO
8
Power
9
IO
10
IO
11
IO
12
IO
P4[3]
P4[1]
SMP
P3[7]
P3[5]
P3[3]
P3[1]
Switch Mode Pump (SMP) connection to external
components required.
P2[5] 1
A, I, P2[3] 2
A, I, P2[1] 3
P4[7] 4
P4[5] 5
P4[3] 6
P4[1] 7
SMP 8
P3[7] 9
P3[5] 10
P3[3] 11
TQFP
33 P2[4],ExternalAGND
32 P2[2], A, I
31 P2[0], A, I
30 P4[6]
29 P4[4]
28 P4[2]
27 P4[0]
26 XRES
25 P3[6]
24 P3[4]
23 P3[2]
13
IO
P1[7] I2C Serial Clock (SCL).
14
IO
P1[5] I2C Serial Data (SDA).
15
IO
P1[3]
16
IO
P1[1] Crystal Input (XTALin), I2C Serial Clock (SCL),
ISSP-SCLK*.
17
Power
Vss Ground connection.
18
IO
P1[0] Crystal Output (XTALout), I2C Serial Data (SDA),
ISSP-SDATA*.
19
IO
P1[2]
20
IO
P1[4] Optional External Clock Input (EXTCLK).
21
IO
P1[6]
22
IO
P3[0]
23
IO
P3[2]
24
IO
P3[4]
25
IO
P3[6]
26
Input
XRES Active high external reset with internal pull down.
27
IO
P4[0]
28
IO
P4[2]
29
IO
P4[4]
30
IO
P4[6]
31
IO
I
P2[0] Direct switched capacitor block input.
32
IO
I
P2[2] Direct switched capacitor block input.
33
IO
P2[4] External Analog Ground (AGND).
34
IO
P2[6] External Voltage Reference (VRef).
35
IO
I
P0[0] Analog column mux input.
36
IO
IO
P0[2] Analog column mux input and column output.
37
IO
IO
P0[4] Analog column mux input and column output.
38
IO
I
P0[6] Analog column mux input.
39
Power
Vdd Supply voltage.
40
IO
I
P0[7] Analog column mux input.
41
IO
IO
P0[5] Analog column mux input and column output.
42
IO
IO
P0[3] Analog column mux input and column output.
43
IO
I
P0[1] Analog column mux input.
44
IO
P2[7]
LEGEND: A = Analog, I = Input, and O = Output.
* These are the ISSP pins, which are not High Z at POR (Power On Reset). See the PSoC Programmable System-on-Chip Technical Reference Manual for details.
Document Number: 38-12012 Rev. *M
Page 10 of 53
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