HMC930A Просмотр технического описания (PDF) - Analog Devices
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HMC930A Datasheet PDF : 16 Pages
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HMC930A
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
34
Data Sheet
2 VGG2
HMC930A
TOP VIEW
(Not to Scale)
RFOUT/VDD 5
1 RFIN
8
76
NOTES
1. DIE BOTTOM MUST BE CONNECTED TO RF/DC GROUND.
Figure 2. Pad Configuration
Table 6. Pad Function Descriptions
Pad No.
Mnemonic Description
1
RFIN
RF Input. This pin is dc-coupled and matched to 50 Ω. A blocking capacitor is required on this pin.
2
VGG2
Gate Control 2 for the Amplifier. Attach bypass capacitors as shown in Figure 37. For nominal operation,
apply 3.5 V to VGG2.
3
ACG1
Low Frequency Termination 1. Attach bypass capacitors as shown in Figure 37.
4
ACG2
Low Frequency Termination 2. Attach bypass capacitors as shown in Figure 37.
5
RFOUT/VDD1 RF Output for the Amplifier (RFOUT).
DC Bias (VDD). Connect VDD to the bias tee network to provide the drain current (IDD). See Figure 37.
6
ACG3
Low Frequency Termination 3. Attach bypass capacitors as shown in Figure 37.
7
ACG4
Low Frequency Termination 4. Attach bypass capacitors as shown in Figure 37.
8
VGG1
Gate Control 1 for the Amplifier. Attach bypass capacitors as shown in Figure 37. Follow the procedures
described in the Biasing Procedures section.
Die Bottom GND
Die bottom must be connected to RF/dc ground.
1 RFOUT/VDD is a multifunction pad.
Rev. 0 | Page 6 of 16
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