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CY2280PVC-11S Просмотр технического описания (PDF) - SpectraLinear Inc

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CY2280PVC-11S Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
CY2280
Switching Characteristics[6, 7]
Parameter Output
t1
All
t2
CPUCLK,
APIC
Description
Output Duty Cycle[8]
CPU and APIC Clock
Rising and Falling Edge
Rate
Test Conditions
t1 = t1A y t1B
Between 0.4V and 2.0V
-1,-11S,
-21S
t2
PCICLK PCI Clock Rising and Between 0.4V and 2.4V
-1,-11S,
Falling Edge Rate
-21S
t2
USBCLK, USB, REF Rising and Between 0.4V and 2.4V
REF
Falling Edge Rate
t3
CPUCLK CPU Clock Rise Time Between 0.4V and 2.0V
-1,-11S,
-21S
t4
CPUCLK CPU Clock Fall Time Between 2.0V and 0.4V
-1,-11S,
-21S
t5
CPUCLK CPU-CPU Clock Skew Measured at 1.25V
t6
CPUCLK, CPU-PCI Clock Skew[9] Measured at 1.25V for 2.5V
-1,-11S,
PCICLK
clocks, and at 1.5V for 3.3V -21S
clocks
t7
PCICLK, PCI-PCI Clock Skew
Measured at 1.5V
PCICLK
t8
CPUCLK, CPU-APIC Clock
APIC
Skew[10]
Measured at 1.25V for 2.5V
clocks
-21S
t9
APIC
APIC-APIC Clock Skew Measured at 1.25V
t10
CPUCLK Cycle-Cycle Clock Jitter Measured at 1.25V
-1,-11S,
-21S
t11
PCICLK Cycle-Cycle Clock Jitter Measured at 1.5V
t12
CPUCLK, Power-up Time
PCICLK
CPU, PCI clock stabilization from
power-up
Notes:
7. All parameters specified with loaded outputs.
8. Duty cycle is measured at 1.5V when VDD = 3.3V. When VDD = 2.5V, duty cycle is measured at 1.25V.
9. PCI lags CPU for -11S and -21S options.
10. APIC lags CPU for -21S option.
Min.
45
1.0
Typ.
50
Max.
55
4.0
Unit
%
V/ns
1.0
4.0 V/ns
0.5
2.0 V/ns
0.4
1.6 ns
0.4
1.6 ns
100 175 ps
1.5
4.0 ns
250 ps
2.0
4.5 ns
100 175 ps
200 250 ps
250 500 ps
3 ms
Rev 1.0, November 25, 2006
Page 5 of 11

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