BUK9212-55B Просмотр технического описания (PDF) - NXP Semiconductors.
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BUK9212-55B Datasheet PDF : 13 Pages
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NXP Semiconductors
BUK9212-55B
N-channel TrenchMOS logic level FET
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VDGR
VGS
ID
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Conditions
Tj ≥ 25 °C; Tj ≤ 185 °C
RGS = 20 kΩ
Tmb = 25 °C; VGS = 5 V; see Figure 1;
see Figure 3
IDM
peak drain current
Ptot
total power dissipation
Tstg
storage temperature
Tj
junction temperature
Source-drain diode
IS
source current
Tmb = 100 °C; VGS = 5 V; see Figure 1
Tmb = 25 °C; pulsed; tp ≤ 10 µs;
see Figure 3
Tmb = 25 °C; see Figure 2
Tmb = 25 °C
ISM
peak source current
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-source
avalanche energy
pulsed; tp ≤ 10 µs; Tmb = 25 °C
ID = 75 A; Vsup ≤ 55 V; RGS = 50 Ω;
VGS = 5 V; Tj(init) = 25 °C; unclamped
[1] Current is limited by power dissipation chip rating.
[2] Continuous current is limited by package.
100
ID
(A)
75
Capped at 75A due to package
03nl11
50
25
120
Pder
(%)
80
40
Min
-
-
-15
[1] -
[2] -
[1] -
-
Max Unit
55 V
55 V
15 V
83 A
75 A
59 A
335 A
-
167 W
-55 185 °C
-55 185 °C
[1] -
[2] -
-
83 A
75 A
335 A
-
173 mJ
03no96
0
0
50
100
150
200
Tmb (°C)
0
0
50
100
150
200
Tmb (°C)
Fig 1. Normalized continuous drain current as a
function of mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
BUK9212-55B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 3 February 2011
© NXP B.V. 2011. All rights reserved.
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