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ISL97678IRZ Просмотр технического описания (PDF) - Renesas Electronics

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ISL97678IRZ
Renesas
Renesas Electronics Renesas
ISL97678IRZ Datasheet PDF : 17 Pages
First Prev 11 12 13 14 15 16 17
ISL97678
TABLE 1. PROTECTIONS TABLE (Continued)
CASE FAILURE MODE
DETECTION MODE
FAILED CHANNEL ACTION
GOOD CHANNELS ACTION
VOUT REGULATED
BY
3 CH1 Short Circuit
Upper OTP not triggered CH1 disabled after 6 PWM cycles
but VIIN1 > VSC
time-out.
If 3 channels are already shut
down, all channels will be shut
down. Otherwise CH2-8 will
remain as normal
Highest VF of CH2
through CH8
4 CH1 Open Circuit
with infinite
resistance
Upper OTP not triggered
and VIIN1 < VSC
VOUT will ramp to OVP. CH1 will
time-out after 6 PWM cycles and
switch off. VOUT will drop to normal
level.
CH2 through CH8 Normal
Highest VF of CH2
through CH8
5 CH1 LED Open
Circuit but has
paralleled Zener
Upper OTP not triggered CH1 remains ON and has highest CH2 through CH8 ON, Q2 through VF of CH1
and VIIN1 < VSC
VF, thus VOUT increases
Q8 burn power
6 CH1 LED Open
Circuit but has
paralleled Zener
Upper OTP triggered but CH1 goes off
VIIN1 < VSC
Same as CH1
VF of CH1
7 CH1 LED Open
Circuit but has
paralleled Zener
Upper OTP not triggered CH1 OFF
but VIIN1 > VSC
Upper OTP not triggered CH1 remains ON and has highest
but VIINx > VSC
VF, thus VOUT increases.
CH2 through CH8 Normal
Highest VF of CH2
through CH8
VOUT increases then CH-X
switches OFF. This is an
unwanted shut off and can be
prevented by setting OVP and/or
VSC at an appropriate level.
VF of CH1
8 Channel-to-Channel Lower OTP triggered but Any channel at below the target current will fault out after 6 PWM
VF too high
VIINx < VSC
cycles.
Remaining channels driven with normal current.
Highest VF of CH1
through CH8
9 Channel-to-Channel Upper OTP triggered but All channels switched off
VF too high
VIINx < VSC
Highest VF of CH1
through CH8
10 Output LED string
voltage too high
VOUT > VOVP
11 VOUT/LX shorted to
GND
Driven with normal current. Any channel that is below the target current Highest VF of CH1
will time-out after 6 PWM cycles.
through CH8
LX will not switch
Components Selections
According to the inductor Voltage-Second Balance principle, the
change of inductor current during the switching regulator
On-time is equal to the change of inductor current during the
switching regulator Off-time. The voltage across an inductor is as
shown in Equation 6:
VL = L  IL  t
(EQ. 6)
and IL @ On = IL @ Off, therefore:
VI 0   L D tS= VO VD VI  L  1 D   tS
(EQ. 7)
where D is the switching duty cycle defined by the turn-on time
over the switching periods. VD is Schottky diode forward voltage
that can be neglected for approximation.
Rearranging the terms without accounting for VD gives the boost
ratio and duty cycle respectively as Equations 8 and 9:
VO VI = 1  1 D
(EQ. 8)
D = VO VI   VO
(EQ. 9)
Input Capacitor
Switching regulators require input capacitors to deliver peak
charging current and to reduce the impedance of the input
supply. This reduces interaction between the regulator and input
supply, thereby improving system stability. The high switching
frequency of the loop causes almost all ripple current to flow in
the input capacitor, which must be rated accordingly.
A capacitor with low internal series resistance should be chosen
to minimize heating effects and improve system efficiency, such
as X5R or X7R ceramic capacitors, which offer small size and a
lower value of temperature and voltage coefficient compared to
other ceramic capacitors.
It is recommended that an input capacitor of at least 10µF be
used. Ensure the voltage rating of the input capacitor is suitable
to handle the full supply range.
FN6998 Rev.3.00
Sep 8, 2017
Page 14 of 17

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