ISL8022 Просмотр технического описания (PDF) - Renesas Electronics
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ISL8022
Renesas Electronics
ISL8022 Datasheet PDF : 18 Pages
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ISL8022
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest Rev.
DATE
REVISION
CHANGE
March 11, 2013
FN7650.3 Table 1 on page 2, changed L1, L2 for 1.8V and 2.5V output from 1.5µh-3.3µh to 1.2µh-3.3µh.
April 7, 2011
FN7650.2
Converted to New Intersil Template
Added second bullet to “Related Literature” on page 1
Replaced copyright at the bottom of page 1 per legal
In “Electrical Specifications” table:
- Changed typ for “Soft-Start Ramp Time Cycle” on page 5 from 2ms to 1.3ms
- In “Output Voltage Accuracy” on page 5, removed reference to Note 7
- Changed typ for “Delay Time (Rising Edge)” on page 6 from 1ms to 0.76ms
- Changed typ for “Internal PGOOD Delay Time (Falling Edge)” on page 6 from 1µs to 2µs
- In “Synchronization Range” on page 6, changed Note 8 reference to Note 7
- Removed Note 8 “Limits established by characterization and are not production tested.”
In “Soft Start-Up” on page 15, changed “..beginning of the start-up, the output voltage is less than 0.2V.” to
“...beginning of the start-up, the feedback voltage is less than 0.2V.”
July 26, 2010
FN7650.1
Updated “Package Outline Drawing” on page 18. Edits were:
Added land pattern
Removed table and added dimensions to drawing, per new POD standards.
Changed Note 4 from “Dimension b applies..” to “Dimension applies..”
June 9, 2010
FN7650.0 Initial Release.
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Also, please check the product information page to ensure that you have the most updated datasheet: ISL8022
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FN7650 Rev 3.00
March 14, 2013
Page 17 of 18
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