ISL6308ACRZ-T Просмотр технического описания (PDF) - Renesas Electronics

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ISL6308ACRZ-T

Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers

Renesas Electronics 

ISL6308A

MOSFET driver detects the change in state of the PWM

signal and turns off the synchronous MOSFET and turns on

the upper MOSFET. The PWM signal will remain high until

the pulse termination signal marks the beginning of the next

cycle by triggering the PWM signal low.

Channel Current Balance

One important benefit of multi-phase operation is the thermal

advantage gained by distributing the dissipated heat over

multiple devices and greater area. By doing this the designer

avoids the complexity of driving parallel MOSFETs and the

expense of using expensive heat sinks and exotic magnetic

materials.

In order to realize the thermal advantage, it is important that

each channel in a multi-phase converter be controlled to

carry about the same amount of current at any load level. To

achieve this, the currents through each channel must be

sampled every switching cycle. The sampled currents, In,

from each active channel are summed together and divided

by the number of active channels. The resulting cycle

average current, IAVG, provides a measure of the total load

current demand on the converter during each switching

cycle. Channel current balance is achieved by comparing

the sampled current of each channel to the cycle average

current, and making the proper adjustment to each channel

pulse width based on the error. Intersil’s patented current-

balance method is illustrated in Figure 3, with error

correction for channel 1 represented. In the figure, the cycle

average current, IAVG, is compared with the Channel 1

sample, I1, to create an error signal IER.

The filtered error signal modifies the pulse width

commanded by VCOMP to correct any unbalance and force

IER toward zero. The same method for error signal

correction is applied to each active channel.

VCOMP

+

-

FILTER f(s)

+ PWM1

-

SAWTOOTH SIGNAL

IER

IAVG

-

N



+

TO GATE

CONTROL

LOGIC

I3

I2

I1

NOTE: Channel 2 and 3 are optional.

FIGURE 3. CHANNEL 1 PWM FUNCTION AND CURRENT-

BALANCE ADJUSTMENT

Current Sampling

In order to realize proper current balance, the currents in

each channel must be sampled every switching cycle. This

sampling occurs during the forced off-time, following a PWM

transition low. During this time the current sense amplifier

FN6669 Rev 0.00

September 9, 2008

uses the ISEN inputs to reproduce a signal proportional to

the inductor current, IL. This sensed current, ISEN, is simply

a scaled version of the inductor current. The sample window

opens exactly 1/6 of the switching period, tSW, after the

PWM transitions low. The sample window then stays open

the rest of the switching cycle until PWM transitions high

again, as illustrated in Figure 4.

The sampled current, at the end of the tSAMPLE, is

proportional to the inductor current and is held until the next

switching period sample. The sampled current is used only

for channel current balance.

IL

PWM

SWITCHING PERIOD

ISEN

SAMPLING PERIOD

OLD SAMPLE

CURRENT

NEW SAMPLE

CURRENT

TIME

FIGURE 4. SAMPLE AND HOLD TIMING

The ISL6308A supports MOSFET rDS(ON) current sensing

to sample each channel’s current for channel current

balance. The internal circuitry, shown in Figure 5 represents

Channel N of an N-channel converter. This circuitry is

repeated for each channel in the converter, but may not be

active depending on the status of the PVCC3 and PVCC2

pins, as described in “PWM Operation” on page 10.

In

ISEN = IL x-r--D-R----SI--S-----OE----N-N-----

SAMPLE

AND

HOLD

-

+

ISL6308A INTERNAL CIRCUIT

VIN

CHANNEL N

UPPER MOSFET

IL

ISEN(n)

RISEN

-

ILx rDSON

+

CHANNEL N

LOWER MOSFET

EXTERNAL CIRCUIT

FIGURE 5. ISL6308A INTERNAL AND EXTERNAL CURRENT-

SENSING CIRCUITRY FOR CURRENT BALANCE

Page 11 of 28

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