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74HC164-Q100 Просмотр технического описания (PDF) - Nexperia B.V. All rights reserved

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74HC164-Q100
NEXPERIA
Nexperia B.V. All rights reserved NEXPERIA
74HC164-Q100 Datasheet PDF : 16 Pages
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Nexperia
74HC164-Q100; 74HCT164-Q100
8-bit serial-in, parallel-out shift register
VI
MR input
VM
GND
VI
tW
trec
CP input
GND
VOH
Qn output
VM
tPHL
VM
Fig. 8.
VOL
001aac427
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation
delays and the master reset to clock (CP) removal time
VI
CP input
GND
VI
Dn input
GND
VM
tsu
th
VM
t su
th
VOH
Fig. 9.
Qn output
VM
VOL
001aac428
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Waveforms showing the data set-up and hold times for Dn inputs
Table 8. Measurement points
Type
Input
VM
74HC164-Q100
0.5VCC
74HCT164-Q100
1.3 V
Output
VM
0.5VCC
1.3 V
VX
0.1VCC
0.1VCC
VY
0.9VCC
0.9VCC
74HC_HCT164_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 11 June 2020
© Nexperia B.V. 2020. All rights reserved
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