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ML9208A-XXMB Просмотр технического описания (PDF) - LAPIS Semiconductor Co., Ltd.

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ML9208A-XXMB Datasheet PDF : 35 Pages
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FEDL9208A-02
ML9208A-xx
FUNCTIONAL DESCRIPTION
Commands List
Command
LSB
1st byte
MSB LSB
2nd byte
MSB
B0 B1 B2 B3 B4 B5 B6 B7 B0 B1 B2 B3 B4 B5 B6 B7
1 DCRAM data write
X0 X1 X2 X3 1 0 0 0 C0 C1 C2 C3 C4 C5 C6 C7
C0 C5 C10 C15 C20 C25 C30 * 2nd byte
C1 C6 C11 C16 C21 C26 C31 * 3rd byte
2 CGRAM data write
X0 X1 X2 * 0 1 0 0 C2 C7 C12 C17 C22 C27 C32 * 4th byte
C3 C8 C13 C18 C23 C28 C33 * 5th byte
C4 C9 C14 C19 C24 C29 C34 * 6th byte
3 ADRAM data write
X0 X1 X2 X3 1 1 0 0 C0 C1 * * * * * *
4 General output port set P1 P2 * * 0 0 1 0 *: Don’t care
5 Display duty set
D0 D1 D2 D3 1
0
1
0
Xn: Address specification for each RAM
Cn: Character code specification for each
6 Number of digits set K0 K1 K2 * 0 1 1 0
RAM
7 All lights ON/OFF
L H * * 1 1 1 0 Pn: General output port status
Test mode
specification
Dn: Display duty specification
Kn: Number of digits specification
H: All lights ON instruction
L: All lights OFF instruction
When data is written to RAM (DCRAM, CGRAM, ADRAM) continuously, addresses are internally incremented
automatically.
Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later bytes.
Note: The test mode is used for inspection before shipment. It is not a user function.
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