74HC1G08GV Просмотр технического описания (PDF) - Nexperia B.V. All rights reserved

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74HC1G08GV

2-input AND gate

Nexperia B.V. All rights reserved 

Nexperia

74HC1G08; 74HCT1G08

2-input AND gate

13 Abbreviations

Table 9. Abbreviations

Acronym

CMOS

DUT

ESD

HBM

MM

TTL

Description

Complementary Metal-Oxide Semiconductor

Device Under Test

ElectroStatic Discharge

Human Body Model

Machine Model

Transistor-Transistor Logic

14 Revision history

Table 10. Revision history

Document ID

Release date

Data sheet status

Change notice Supersedes

74HC_HCT1G08 v.5

20180314

Product data sheet

-

74HC_HCT1G08 v.4

Modifications:

• The format of this data sheet has been redesigned to comply with the identity guidelines of

Nexperia.

• Legal texts have been adapted to the new company name where appropriate.

74HC_HCT1G08 v.4

20070717

Product data sheet

-

74HC_HCT1G08 v.3

Modifications:

• The format of this data sheet has been redesigned to comply with the new identity guidelines

of NXP Semiconductors.

• Legal texts have been adapted to the new company name where appropriate.

• Package SOT353 changed to SOT353-1 in Table 1 and Figure 7.

• Quick Reference Data and Soldering sections removed.

• Section 2 "Features" updated.

74HC_HCT1G08 v.3

20020517

Product specification

-

74HC_HCT1G08 v.2

74HC_HCT1G08 v.2

20010302

Product specification

-

74HC_HCT1G08 v.1

74HC_HCT1G08 v.1

19981110

Preliminary specification

-

-

74HC_HCT1G08

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 5 — 14 March 2018

© Nexperia B.V. 2018. All rights reserved.

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