CS5531 Просмотр технического описания (PDF) - Cirrus Logic

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CS5531

16-Bit and 24-Bit ADCs with Ultra Low Noise PGIA

Cirrus Logic 

CS5531/32/33/34

LIST OF FIGURES

Figure 1. SDI Write Timing (Not to Scale) ...............................................................................13

Figure 2. SDO Read Timing (Not to Scale) .............................................................................13

Figure 3. Multiplexer Configuration .........................................................................................14

Figure 4. Input models for AIN+ and AIN- pins .......................................................................15

Figure 5. Measured Voltage Noise Density .............................................................................15

Figure 6. CS5531/32/33/34 Register Diagram ........................................................................16

Figure 7. Command and Data Word Timing............................................................................24

Figure 8. Guard Signal Shielding Scheme ..............................................................................26

Figure 9. Input Reference Model when VRS = 1.....................................................................27

Figure 10. Input Reference Model when VRS = 0...................................................................27

Figure 11. Self Calibration of Offset ........................................................................................34

Figure 12. Self Calibration of Gain ..........................................................................................34

Figure 13. System Calibration of Offset ..................................................................................34

Figure 14. System Calibration of Gain ....................................................................................34

Figure 15. Synchronizing Multiple ADCs.................................................................................38

Figure 16. Digital Filter Response (Word Rate = 60 Sps) .......................................................40

Figure 17. 120 Sps Filter Magnitude Plot to 120 Hz................................................................40

Figure 18. 120 Sps Filter Phase Plot to 120 Hz ......................................................................40

Figure 19. Z-Transforms of Digital Filters ................................................................................40

Figure 20. On-chip Oscillator Model........................................................................................41

Figure 21. CS5532 Configured with a Single +5 V Supply......................................................42

Figure 22. CS5532 Configured with ±2.5 V Analog Supplies..................................................43

Figure 23. CS5532 Configured with ±3 V Analog Supplies .....................................................43

Figure 24. CS5532 Configured for Thermocouple Measurement ...........................................44

Figure 25. Bridge with Series Resistors ..................................................................................44

LIST OF TABLES

Table 1. Conversion Timing for Single Mode ..........................................................................36

Table 2. Conversion Timing for Continuous Mode ..................................................................37

Table 3. Command Byte Pointer .............................................................................................37

Table 4. Output Coding for 16-bit CS5531 and CS5533 .........................................................39

Table 5. Output Coding for 24-bit CS5532 and CS5534 .........................................................39

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DS289PP5

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