CDB5364 Просмотр технического описания (PDF) - Cirrus Logic

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CDB5364

Evaluation Board for CS5364

Cirrus Logic 

CDB5364

4.2 Switches

The CDB5364 Evaluation Board switches are used for setting speed modes and format protocols and for

resetting devices to their default state. The switch functions are described in Table 2.

.

DESIGNATOR

NAME

FUNCTION (see CS5364 Datasheet for details)

S1-1

M0

speed mode; Master/Slave function

S1-2

M1

speed mode; Master/Slave function

S1-3

DIF0

Data Format

S1-4

DIF1

Data Format

S1-5

TDM0

Select Channel pairs for S/PDIF output

S1-6

TDM1

Select Channel pairs for S/PDIF output

S4-1

MDIV

Master Clock Divider

S4-2

CLKMODE

Master Clock Divider

S3

BOARD RESET

Resets CS5364, CS8406 and FPGA

S2

PGM

Forces FPGA to be loaded with new code (not needed by

user)

Table 2. CDB5364 Switches

4.3 User Configuration Jumpers

The CDB5364 Evaluation Board jumpers are used for signal routing as shown in Table 3

.

DESIGNATOR

J7

J91

J85

J11

J9

J4

NAME

CONTROL

-

-

OSC/XTL

+5 V/VA EXT

DSP HEADER

FUNCTION

Select I²C control Source

Short to ground when not using Crystal

Short to ground when not using Crystal

Canned Oscillator/Crystal Selection

VA source selector

Table 3. User Jumpers

4.4 Reserved Factory Programming Jumpers

The CDB5364 Evaluation Board has two reserved headers, J15 and J8, that are used to factory program

the Cygnal® 8051 microprocessor and the Xilinx® FPGA so that the FlexGUI interface operates correctly.

Caution! Do not apply power or shorts to these two jumpers as device damage could occur.

.

DESIGNATOR

NAME

J15

MICRO_PROG

FUNCTION

Reserved interface for pre-programming the Evaluation Board

J8

JTAG

Reserved interface for pre-programming the Evaluation Board

Table 4. CDB5364 Reserved Jumpers

10

DS625DB1

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