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MAX15108AEWP

High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator

Maxim Integrated 

MAX15108A

High-Efficiency, 8A, Current-Mode

Synchronous Step-Down Switching Regulator

Programmable Soft-Start (SS)

The IC utilizes a soft-start feature to slowly ramp up the

regulated output voltage to reduce input inrush current

during startup. Connect a capacitor from SS to SGND to

set the startup time. See the Setting the Soft-Start Startup

Time section for capacitor selection details.

Error Amplifier

A high-gain error amplifier provides accuracy for the

voltage feedback loop regulation. Connect a compen-

sation network between COMP and SGND. See the

Compensation Design Guidelines section. The error

amplifier transconductance is 1.4mS. COMP clamp low

is set to 0.93V, just below the PWM ramp compensation

valley, helping COMP to rapidly return to the correct set

point during load and line transients.

PWM Comparator

The PWM comparator compares COMP voltage to the

current-derived ramp waveform (LX current to COMP volt-

age transconductance value is 25A/V). To avoid instability

due to subharmonic oscillations when the duty cycle is

around 50% or higher, a compensation ramp is added to

the current-derived ramp waveform. The compensation

ramp slope (0.3V x 1MHz = 0.3V/µs) is equivalent to half

of the inductor current down-slope in the worst case (load

2A, current ripple 30% and maximum duty-cycle operation

of 95%). The compensation ramp valley is set to 1V.

Overcurrent Protection and Hiccup

When the converter output is connected to ground or the

device is overloaded, each high-side MOSFET current-

limit event (14A) turns off the high-side MOSFET and

turns on the low-side MOSFET. A 3-bit counter incre-

ments on each current-limit event. The counter is reset

after three consecutive events of high-side MOSFET

turn-on without reaching the current limit. If the current-

limit condition persists, the counter fills up reaching eight

events. The control logic then discharges SS, stops both

high-side and low-side MOSFETs and waits for a hiccup

period (1024 clock cycles) before attempting a new soft-

start sequence. The hiccup-mode also operates during

soft-start.

Thermal Shutdown Protection

The IC contains an internal thermal sensor that limits

the total power dissipation to protect it in the event of an

extended thermal fault condition. When the die tempera-

ture exceeds +160°C, the thermal sensor shuts down the

device, turning off the DC-DC converter to allow the die

to cool. After the die temperature falls by 25°C, the device

restarts, following the soft-start sequence.

Applications Information

Setting the Output Voltage

Connect a voltage-divider (R1 and R2, see Figure 1) from

OUT to FB to PGND to set the DC-DC converter output

voltage. Choose R1 and R2 so that the DC errors due to

the FB input bias current do not affect the output-voltage

precision. With lower value resistors, the DC error is

reduced, but the amount of power consumed in the resis-

tive divider increases. A typical tradeoff value for R2 is

5kΩ, but values between 1kΩ and 20kΩ are acceptable.

Once R2 is chosen, calculate R1 using:

R=1

R2

×







VOUT

VFB



- 1



where the feedback threshold voltage VFB = 0.6V.

Inductor Selection

A large inductor value results in reduced inductor ripple

current, leading to a reduced output ripple voltage. A high-

value inductor is of a larger physical size with a higher

series resistance (DCR) and a lower saturation current

rating. Choose inductor values to produce a ripple current

equal to 30% of the load current.

Choose the inductor with the following formula:

=L

VOUT

fSW × ∆IL

×



1-



VOUT

VIN







where fSW is the internally fixed 1MHz switching fre-

quency, and ∆IL is the estimated inductor ripple current

(typically set to 0.3 x ILOAD). In addition, the peak induc-

tor current, IL_PK, must always be below the high-side

current-limit value, IHSCL, and the inductor saturation

current rating, IL_SAT.

Ensure that the following relationship is satisfied:

IL= _PK

ILOAD

+

1

2

×

∆IL

<

MIN(IHSCL,IL_SAT )

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