ML4819 Просмотр технического описания (PDF) - Fairchild Semiconductor
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ML4819 Datasheet PDF : 15 Pages
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ML4819
PIN CONFIGURATION
ML4819
20-Pin PDIP
ISENSE A
OVP
GM OUT
EA OUT A
INV A
ISINE
DUTY CYCLE
PWM B
ISENSE B
RT
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
TOP VIEW
CT
GND
VREF
PGND A
OUT A
VCC
OUT B
PGND B
RAMP COMP
ILIM
PIN DESCRIPTION
PIN NAME
1 ISENSE A
FUNCTION
Input form the PFC current sense
transformer to the PWM comparator
(+). Current Limit occurs when this
point reaches 5V.
2 OVP
Input to Over-Voltage comparator.
3 GM OUT
Output of Gain Modulator. A resistor
to ground on this pin converts the
current to a voltage.
4 EA OUT A Output of error amplifier.
5 INV A
Inverting input to error amplifier.
6 ISINE
Current Multiplier input.
7 DUTY CYCLE PWM controller duty cycle is limited
by setting this pin to a fixed voltage.
8 PWM B
Error voltage feedback input.
9 ISENSE B
Input for Current Sense resistor for
current mode operation or for
Oscillator ramp for voltage mode
operation.
10 RT
Oscillator timing resistor pin. A 5V
source across this resistor sets the
charging current for CT
PIN NAME
11 ILIM
FUNCTION
Cycle by cycle PWM current limit.
Exceeding 1V threshold on this pin
terminates the PWM cycle.
12 RAMP COMP Buffered output from the Oscillator
Ramp (CT). A resistor to ground sets a
current, 1/2 of which is sourced on
pins 9 and 11.
13 GND B
Return for the high current totem pole
output of the PWM controller.
14 OUT B
PWM controller totem pole output.
15 VCC
16 OUT A
Positive Supply for the IC.
PFC controller totem pole output.
17 GND A
Return for the high current totem pole
output of the PFC controller.
18 VREF
Buffered output for the 5V voltage
reference
19 GND
Analog signal ground.
20 CT
Timing Capacitor for the Oscillator.
2
REV. 1.0 10/10/2000
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