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SAB9083

Multistandard Picture-In-Picture (PIP) controller

Philips Electronics 

Philips Semiconductors

Multistandard Picture-In-Picture (PIP)

controller

Preliminary specification

SAB9083

FEATURES

• Double window Picture-In-Picture (PIP) in interlaced or

non-interlaced mode at 8-bit resolution

• Internal 1-Mbit DRAM

• Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit

performance) with clamp circuit for each acquisition

channel

• One PLL which generates the line-locked clocks for the

subchannel

• One PLL which generates the line-locked clocks for the

main and display channels

• Three 8-bit Digital-to-Analog Converters (DACs)

• Linear zoom in both horizontal and vertical directions for

the subchannel

• Linear zoom in horizontal direction for the main channel

• Three multistandard PIP modes are available.

GENERAL DESCRIPTION

The SAB9083 is a multistandard PIP controller which can

be used in double window applications. The SAB9083

inserts one or two live video signals with reduced size into

another live video signal. The incoming video signals are

expected to be analog baseband signals.

The conversion to the digital environment is done on chip

with ADCs. Processing and storage of the video data is

done entirely in the digital domain. The conversion back to

the analog domain is done by means of DACs. Internal

clocks are generated by PLLs which lock on to the applied

horizontal and vertical syncs.

The main input channel is compressed horizontally by a

factor of two and directly fed to the output. After

compression, a horizontal expansion of two is possible for

the main channel.

The subchannel is also compressed horizontally by a

factor of two but stored in memory before it is fed to the

outputs.

The SAB9083 can also create three multistandard PIP

modes, one with three PIPs placed in a column (MP3) and

two with two columns of three PIPs (MP6, MP6S).

The reduction factors of these PIPs are horizontal 1⁄4 and

vertical 1⁄3. In the first two modes, the column(s) can be

placed on the left or right side of the screen.

QUICK REFERENCE DATA

SYMBOL

Supply

VDDD

VDDA

IDDD

IDDA

PLL

fclk(sys)

Bloop

tjitter

ζ

PARAMETER

digital supply voltage

analog supply voltage

digital supply current

analog supply current

system clock frequency

loop bandwidth

short term stability

damping factor

CONDITIONS

1792 × fHSYNC

peak-to-peak jitter for 64 µs

MIN. TYP. MAX. UNIT

3.0

3.3

3.6 V

3.0

3.3

3.6 V

−

50

−

mA

140 165 210 mA

−

28

−

MHz

−

4

−

kHz

−

−

4

ns

−

0.7

−

ORDERING INFORMATION

TYPE NUMBER

SAB9083H

NAME

QFP100

PACKAGE

DESCRIPTION

plastic quad flat package; 100 leads (lead length 1.95 mm);

body 14 × 20 × 2.8 mm

VERSION

SOT317-2

1999 Nov 12

2

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