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LH532100BD-1

CMOS 2M (256K × 8) MROM

Sharp Electronics 

CMOS 2M MROM

LH532100B-1

AC CHARACTERISTICS (VCC = 5 V ±10%, TA = 0°C to +70°C)

PARAMETER

SYMBOL

MIN.

MAX.

UNIT

Read cycle time

tRC

120

ns

Address access time

tAA

120

ns

Chip enable access time

tACE

120

ns

Output enable delay time

tOE

50

ns

Output hold time

tOH

10

ns

CE to output in High-Z

OE to output in High-Z

tCHZ

tOHZ

50

ns

NOTE:

1. This is the time required for the outputs to become high-impedance.

AC TEST CONDITIONS

PARAMETER

Input voltage amplitude

Input rise/fall time

Input reference level

Output reference level

Output load condition

RATING

0.6 V to 2.4 V

10 ns

1.5 V

0.8 V and 2.2 V

1 TTL + 100 pF

NOTE

1

CAUTION

To stabilize the power supply, it is recommended that a high-frequency bypass capacitor be connected between

the VCC pin and the GND pin.

tRC

A0 - A17

CE

OE/OE1

OE/OE1

tAA

(NOTE)

tACE

(NOTE)

tOE

(NOTE)

tCHZ

tOHZ

tOH

D0 - D7

DATA VALID

NOTE: The output data becomes valid when the

last intervals, tAA, tACE, or tOE, have concluded.

Figure 6. Timing Diagram

532100B1-5

5

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