MAX186ACAP(2012) Просмотр технического описания (PDF) - Maxim Integrated

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MAX186ACAP
(Rev.:2012)

Low-Power, 8-Channel, Serial 12-Bit ADCs

Maxim Integrated 

MAX186/MAX188

Low-Power, 8-Channel,

Serial 12-Bit ADCs

SUPPLIES

+5V

-5V

GND

R* = 10Ω

VDD

AGND

VSS DGND

MAX186/MAX188

+5V DGND

DIGITAL

CIRCUITRY

* OPTIONAL

Figure 18. Power-Supply Grounding Connection

High-Speed Digital Interfacing with QSPI

The MAX186/MAX188 can interface with QSPI at high

throughput rates using the circuit in Figure 19. This

QSPI circuit can be programmed to do a conversion on

each of the eight channels. The result is stored in mem-

ory without taxing the CPU since QSPI incorporates its

own micro-sequencer. Figure 19 depicts the MAX186,

but the same circuit could be used with the MAX188 by

adding an external reference to VREF and connecting

REFADJ to VDD.

Figure 20 details the code that sets up QSPI for

autonomous operation. In external clock mode, the

MAX186/MAX188 perform a single-ended, unipolar con-

version on each of their eight analog input channels.

Figure 21, QSPI Assembly-Code Timing, shows the tim-

ing associated with the assembly code of Figure 20. The

first byte clocked into the MAX186/MAX188 is the control

byte, which triggers the first conversion on CH0. The last

two bytes clocked into the MAX186/MAX188 are all zero

and clock out the results of the CH7 conversion.

ANALOG

INPUTS

+

1 CH0

2 CH1

VDD 20

SCLK 19

3 CH2

CS 18

4 CH3

DIN 17

MAX186

5 CH4

SSTRB 16

6 CH5

DOUT 15

7 CH6

DGND 14

8 CH7

AGND 13

9 VSS

10 SHDN

REFADJ 12

VREF 11

+5V

0.1μF 4.7μF

VDDI, VDDE, VDDSYN, VSTBY

SCK

PCS0

MOSI

MISO

MC68HC16

0.1μF + 4.7μF

0.01μF

VSSI VSSE

Figure 19. MAX186 QSPI Connection

20

* CLOCK CONNECTIONS NOT SHOWN

Maxim Integrated

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