IZD1520 Просмотр технического описания (PDF) - Integral Corp.
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IZD1520 Datasheet PDF : 13 Pages
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CMOS DOT MATRIX LCD DRIVER
IZD1520
• Read/Write timing for the 80-port MPU
Characteristic
Address hold time
Address setup time
System cycle time
Control pulse width
Data setup time
Data hold time
VDD access time
Output Disable time
Low-level pulsewidth
High-level pulsewidth
Rise time
Fall time
FR delay time Note 1
FR delay time Note 2
Symbol
tAH8
tAW8
tCYC8
tCC8
tDS8
tDH8
tACC8
tOH8
tWLCL
tWHCL
tr
tf
tFDR
tFDR
Signal
A0, CS
WR, RD
D0 ÷ D7
CL
FR (Input)
FR (Input)
Condition
CL = 100pF
• Read/Write timing for the 68-port MPU
Characteristic
System cycle time
Address setup time
Address hold time
Data setup time
Data hold time
Output disable time
Access time
Enable
READ
pulse width
WRITE
Low-level pulsewidth
High-level pulsewidth
Rise time
Fall time
FR delay time Note 1
FR delay time Note 2
Symbol
tCYC6
tAW6
tAH6
tDS6
tDH6
tOH6
tACC6
tEW
tWLCL
tWHCL
tr
tf
tFDR
tFDR
Signal
A0
R/W
D0 ÷ D7
E
CL
FR (Input)
FR (Input)
Condition
CL = 100pF
* The rating when VSS = -3.0V are approximately 100% higher that when VSS = -5.0V
Notes: 1. The listed input tFDR applies to IZD1520 and IZD1521 in slave mode.
2. The listed input tFDR applies to IZD1520 and IZD1521 in master mode.
Min
Typ
10
20
1000
200
80
10
10
35
35
30
30
-2.0
0.2
0.2
Max
Unit
ns
ns
ns
ns
ns
ns
90
ns
60
ns
µs
µs
150
ns
150
ns
2.0
µs
2.0
µs
Min
Typ
1000
20
10
80
10
10
100
80
35
35
30
30
-2.0
0.2
0.2
Max
Unit
ns
ns
ns
ns
ns
60
ns
90
ns
ns
ns
µs
µs
150
ns
150
ns
2.0
µs
2.0
µs
6
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