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CXA3512R

LCD Driver

Sony Semiconductor 

CXA3512R

Pin

No.

Symbol

I/O

Standard

voltage level

58 DLYCTR

I 3 to 5V

Equivalent circuit

VDD

VDD

58

10k

25µ

VDD

VDD

Description

Dot clock phase adjustment.

The CLKOUT phase relative to

MCLK can be changed by the

voltage of this pin.

Connection to the CXA2111R

DLY_CNT output allows digital

control using the I2C register of the

CXA2111R.

59

60

CLKOUT

CLKOUTX

O

VDD – 0.3V

to VDD

59

60

150

Phase-adjusted dot clock outputs.

1m

1m

62 CLKIN

63 CLKINX

64 F/H_CNT

I

VDD – 0.3V

to VDD

High: ≥ 2.5V

I Low: ≤ 0.8V

OPEN High

VDD

VDD VDD

2k

2k

62

63

145

100µ

Dot clock inputs for timing

generation.

Connect the CLKOUT (CLKOUTX)

pin.

When not using the CLK phase

adjustment function, the dot clock

can also be input directly to these

pins by PECL differential input.

VDD

VDD VDD VDD

100k 20k

20k

64

40k

12µ

SHOUT output timing selection.

High: SHOUT 1 to 3 and SHOUT 4

to 6 are output at different timing.

Low: SHOUT 1 to 6 are output at the

same timing.

23 PGND

26 PVCC

42 VCC

52 VDD

53 DGND

8, 9,

24, 25,

40, 41,

GND

56, 57

3, 4,

7, 12,

15, 18,

20, 22, NC

27, 29,

31, 43,

48, 61

GND

15.5V

15.5V

5V

GND

GND

–7–

Power GND.

Power VCC.

Connect directly to VCC.

15V power supply.

5V power supply.

Digital GND.

Analog GND.

No connection.

Not connected to anything.

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