HD74AC195 Просмотр технического описания (PDF) - Renesas Electronics

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HD74AC195

4-bit Parallel-Access Shift Register

Renesas Electronics 

HD74AC195

Pin Names

CP

D0 to D3

PE

MR

J, K

Q0 to Q3, Q3

Clock Pulse Input (Active Rising Edge)

Parallel Data Inputs

Parallel Enable Input

Asynchronous Master Reset

J-K or D Type Serial Inputs

Outputs

Timing Diagram

CP

MR

J

K

PE

D0

D1

D2

D3

Q0

Q1

Q2

Q3

Clear

H

L

H

L

Serial Shift

Load

Serial Shift

Mode Select-Function Table

Inputs

Outputs

Operating Modes

Asynchronous Reset

MR CP PE J

K

Dn

Q0

L

X

X

X

X

X

L

Q1

L

Q2

L

Q3

L

Q3

H

Shift, Set First Stage

H

Shift, Reset First Stage H

Shift, Toggle First Stage H

Shift, Retain First Stage H

Parallel Load

H

H : HIGH Voltage Level

HHHXH

q0

q1

q2

q2

H

L

L

X

L

q0

q1

q2

q2

H

H

L

X

q0

q0

q1

q2

q2

H

L

H

X

q0

q0

q1

q2

q2

L

X

X

dn

d0

d1

d2

d3

d3

L : LOW Voltage Level

X : Immaterial

Lower case letters indicate the state of the referenced input (or output) one setup time prior to the LOW-to-HIGH

transition.

: LOW-to-HIGH clock transition.

Rev.2.00, Jul.16.2004, page 3 of 7

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