DM74ALS652(2000) Просмотр технического описания (PDF) - Fairchild Semiconductor
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DM74ALS652 Datasheet PDF : 6 Pages
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Switching Characteristics
over recommended operating free air temperature range (Note 6)
Symbol
Parameter
Conditions
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
(with A or B LOW) (Note 6)
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
(with A or B LOW) (Note 6)
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
(with A or B HIGH) (Note 6)
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
(with A or B HIGH) (Note 6)
VCC = 4.5V to 5.5V,
CL = 50 pF,
R1 = R2 = 500Ω,
TA = Min to Max
From (Input)
Min
To (Output)
CBA or CAB
10
to A or B
CBA or CAB
5
to A or B
A or B to
5
B or A
A or B to
3
B or A
SBA or SAB
12
to A or B
SBA or SAB
6
to A or B
SBA or SAB
6
to A or B
SBA or SAB
5
to A or B
tPZH
Output Enable Time
to HIGH Level Output
GBA to
3
A
tPZL
Output Enable Time
to LOW Level Output
GBA to
5
A
tPHZ
Output Disable Time
from HIGH Level Output
GBA to
1
A
tPLZ
Output Disable Time
from LOW Level Output
GBA to
2
A
tPZH
Output Enable Time
to HIGH Level Output
GAB to
6
B
tPZL
Output Enable Time
to LOW Level Output
GAB to
6
B
tPHZ
Output Disable Time
from HIGH Level Output
GAB to
1
B
tPLZ
Output Disable Time
from LOW Level Output
GAB to
2
B
Note 6: These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
Max
30
17
18
12
35
20
25
20
17
18
10
16
22
18
10
16
Units
ns
ns
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ns
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ns
ns
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ns
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