ISL59481 Просмотр технического описания (PDF) - Renesas Electronics
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ISL59481 Datasheet PDF : 12 Pages
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ISL59481
Pin Equivalent Circuits
V+
IN
V-
V1+
GNDA1
GNDB1
GNDC1
V1-
CIRCUIT 1
CAPACITIVELY
COUPLED
ESD CLAMP
CIRCUIT 4A
LOGIC PIN
21k
+
33k 1.2V-
V+
GND
V-
CIRCUIT 2
V2+
GNDA2
GNDB2
GNDC2
V2-
CAPACITIVELY
COUPLED
ESD CLAMP
CIRCUIT 4B
V+
OUT
V-
CIRCUIT 3
SUBSTRATE 1
V1-
~1M
SUBSTRATE 2
V2-
~1M
THERMAL HEAT SINK PAD
AC Test Circuits
VIN
50
or
75
ISL59481
CL
5pF
RL
500
FIGURE 15A. TEST CIRCUIT WITH OPTIMAL OUTPUT LOAD
ISL59481
VIN
RS
50
CL 475
50
or
5pF
or
75
75
TEST
EQUIPMENT
50
or
75
FIGURE 15B. TEST CIRCUIT FOR MEASURING WITH 50OR
75INPUT TERMINATED EQUIPMENT
VIN
50
or
75
ISL59481
RS
CL 50 or 75
5pF
TEST
EQUIPMENT
50
or
75
FIGURE 15C. BACKLOADED TEST CIRCUIT FOR VIDEO
CABLE APPLICATION. BANDWIDTH AND
LINEARITY FOR RL LESS THAN 500 WILL BE
DEGRADED.
FIGURE 15. TEST CIRCUITS
Figure 15A illustrates the optimum output load for testing AC
performance. Figure 15B illustrates the optimum output load
when connecting to 50 input terminated equipment.
FN6208 Rev 4.00
May 18, 2007
Application Information
General
The ISL59481 is ideal as the matrix element of high
performance switchers and routers. Key features include high
impedance buffered analog inputs and excellent AC
performance at output loads down to 150 for video cable-
driving. The unity-gain current feedback output amplifiers are
stable operating into capacitive loads and bandwidth is
optimized with a load of 5pF in parallel with a 500. Total
output capacitance can be split between the PCB capacitance
and an external load capacitor.
Ground Connections
For the best isolation and crosstalk rejection, all GND pins
must connect to the GND plane.
Power-up Considerations
The ESD protection circuits use internal diodes from all pins
the V+ and V- supplies. In addition, a dV/dT-triggered clamp is
connected between the V+ and V- pins, as shown in the
Equivalent Circuits 1 through 4 section of the Pin Description
table. The dV/dT triggered clamp imposes a maximum supply
turn-on slew rate of 1V/µs. Damaging currents can flow for
power supply rates-of-rise in excess of 1V/µs, such as during
hot plugging. Under these conditions, additional methods
should be employed to ensure the rate of rise is not exceeded.
Consideration must be given to the order in which power is
applied to the V+ and V- pins, as well as analog and logic input
pins. Schottky diodes (Motorola MBR0550T or equivalent)
connected from V+ to ground and V- to ground (Figure 16) will
shunt damaging currents away from the internal V+ and V-
ESD diodes in the event that the V+ supply is applied to the
device before the V- supply. One Schottky can be used to
protect both V+ power supply pins, and a second for the
protection of both V- pins.
If positive voltages are applied to the logic or analog video
input pins before V+ is applied, current will flow through the
Page 8 of 12
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