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HD74LV174A

Hex D-type Flip-Flops with Clear

Hitachi -> Renesas Electronics 

HD74LV174A

Hex D-type Flip-Flops with Clear

ADE-205-269 (Z)

1st Edition

April 1999

Description

This device contains 6 master-slave flip-flops with a common clock and common clear. Data on the D

input having the specified setup and hold times is transferred to the Q output on the low to high transition

of the clock input. The clear input when low, sets all outputs to a low state. Low-voltage and high-speed

operation is suitable for battery-powered products (e.g., notebook computers), and the low-power

consumption extends the battery life.

Features

• VCC = 2.0 V to 5.5 V operation

• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)

• All outputs VO (Max.) = 5.5 V (@VCC = 0 V)

• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)

• Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)

• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)

Function Table

Inputs

CLR

CLK

D

L

X

X

H

↑

H

H

↑

L

H

↓

X

Note:

H: High level

L: Low level

X: Immaterial

↑: Low to high transition

↓: High to low transition

Output Q

L

H

L

no change

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