DC OPERATING CONDITIONS AND CHARACTERISTICS
(0°C ≤ TA ≤ 70°C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS (See Notes 1 through 4)
Parameter
Symbol
Typical Typical Typical Typical
Min
–5
–6
–7
–8
Max Unit Notes
Input Reference DC Voltage
Core Power Supply Voltage
Output Driver Supply Voltage
Active Power Supply Current
Vref (dc)
0.6
—
—
—
—
1.1
V
11
VDD
3.15
—
—
—
—
3.6
V
VDDQ
1.4
—
—
—
—
1.6
V
(x18)
(x36)
IDD1
—
350
330
300
290
450 mA
5
—
460
430
390
370
560
Quiescent Active Power Supply Current
IDD2
—
190
190
190
190
250 mA 6, 10
Active Standby Power Supply Current
ISB1
—
160
160
160
160
250 mA
7
Quiescent Standby Power Supply Current
ISB2
—
140
140
140
140
230 mA 8, 10
Sleep Mode Power Supply Current
ISB3
—
TBD TBD TBD TBD TBD mA 9, 10
NOTES:
1. All data sheet parameters specified to full range of VDD unless otherwise noted. All voltages are referenced to voltage applied to VSS bumps.
2. Supply voltage applied to VDD connections.
3. Supply voltage applied to VDDQ connections.
4. All power supply currents measured with outputs open or deselected.
5. VDD = VDD (max), tKHKH = tKHKH (min), SS registered active, 50% read cycles.
6. VDD = VDD (max), tKHKH = dc, SS registered active.
7. VDD = VDD (max), tKHKH = tKHKH (min), SS registered inactive.
8. VDD = VDD (max), tKHKH = dc, SS registered inactive, ZZ low.
9. VDD = VDD (Max), tKHKH = dc, SS registered inactive, ZZ high.
10. 200 mV ≥ Vin ≥ VDDQ – 200 mV.
11. Although considerable latitude in the selection of the nominal dc value (i.e., rms value) of Vref is supported, the peak to peak ac component
superimposed on Vref may not exceed 5% of the dc component of Vref.
DC INPUT CHARACTERISTICS
Parameter
Symbol
Min
Max
Unit Notes
DC Input Logic High
VIH (dc)
Vref + 0.1 VDD + 0.3
V
DC Input Logic Low
VIL (dc)
– 0.3
Vref – 0.1
V
1
Input Leakage Current
Ilkg(1)
—
±5
µA
2
Clock Input Signal Voltage
Vin (dc)
– 0.3
VDD + 0.3
V
Clock Input Differential Voltage
VDIF (dc)
0.2
VDD + 0.6
V
3
Clock Input Common Mode Voltage Range (See Figure 2)
VCM (dc)
0.68
1.1
V
4
Clock Input Crossing Point Voltage Range (See Figure 2)
VX
0.68
1.1
V
NOTES:
1. Inputs may undershoot to –0.5 V (peak) for up to 20% tKHKH (e.g., 2 ns at a clock cycle time of 10 ns). See Figure 2.
2. 0 V ≤ Vin ≤ VDDQ for all pins.
3. Minimum instantaneous differential input voltage required for differential input clock operation.
4. Maximum rejectable common mode input voltage variation.
MCM69R736A•MCM69R818A
6
MOTOROLA FAST SRAM