MCM69L736AZP8.5 Просмотр технического описания (PDF) - Motorola => Freescale

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MCM69L736AZP8.5

4M Late Write HSTL

Motorola => Freescale 

DC OUTPUT BUFFER CHARACTERISTICS – PROGRAMMABLE IMPEDANCE PUSH–PULL OUTPUT BUFFER MODE

(0_C ≤ TA ≤ 70_C, Unless Otherwise Noted, See Notes 5 and 6)

Parameter

Symbol

Min

Max

Unit Notes

Output Logic Low

VOL

VDDQ/2 – 0.025 VDDQ/2 +0.025

V

1

Output Logic High

VOH

VDDQ/2 – 0.025 VDDQ/2 + 0.025

V

2

Light Load Output Logic Low

VOL1

VSS

0.2

V

3

Light Load Output Logic High

VOH1

VDDQ – 0.2

VDDQ

V

4

NOTES:

1. IOL = (VDDQ/2)/(RQ/5) for values of RQ = 175 Ω ≤ RQ ≤ 350 Ω.

2. | IOH | = (VDDQ/2)/(RQ/5) for values of RQ = 175 Ω ≤ RQ ≤ 350 Ω.

3. IOL ≤ 100 µA.

4. | IOH | ≤ 100 µA.

5. The impedance controlled mode is expected to be used in point–to–point applications, driving high impedance inputs.

6. The ZQ pin is connected through RQ to VSS for the controlled impedance mode.

DC OUTPUT BUFFER CHARACTERISTICS — MINIMUM IMPEDANCE PUSH–PULL OUTPUT BUFFER MODE

(0_C ≤ TA ≤ 70_C, ZQ = VDD) (See Notes 1 and 2)

Parameter

Symbol

Min

Max

Unit

Notes

Output Logic Low

VOL2

VSS

0.4

V

3

Output Logic High

VOH2

VDDQ – 0.4

VDDQ

V

4

Light Load Output Logic Low

VOL3

VSS

0.2

V

5

Light Load Output Logic High

VOH3

VDDQ – 0.2

VDDQ

V

6

NOTES:

1. The push–pull output mode is expected to be used in bussed applications and may be series or parallel terminated. Conforms to the JEDEC

Standard JESD8–6 Class I.

2. The ZQ pin is connected to VDD to enable the minimum impedance mode.

3. IOL ≤ 8 mA.

4. IOH ≤ 8 mA.

5. IOL ≤ 100 µA.

6. IOH ≤ 100 µA.

CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, 0_C ≤ TA ≤ 70_C, Periodically Sampled Rather Than 100% Tested)

Characteristic

Symbol

Typ

Input Capacitance

Input/Output Capacitance

CK, CK Capacitance

Cin

4

CI/O

7

CCK

4

Max

Unit

5

pF

8

pF

5

pF

MOTOROLA FAST SRAM

MCM69L736A•MCM69L818A

7

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