RV5C386A_03 Просмотр технического описания (PDF) - RICOH Co.,Ltd.

Номер в каталоге

Компоненты Описание

Список матч

RV5C386A_03

I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION

RICOH Co.,Ltd. 

8.4 Interrupt Process

8.4-1 Periodic Interrupt

Set Periodic Interrupt

Cycle Selection Bits

*1

Generate Interrupt to CPU

CTFG=1?

NO

YES

Periodic Interrupt Process

Other Interrupt

Processes

Write “×,1,×,1,×,0,1,1” *2

to Control Register 2

RV5C386A

*1) This step is intended to select the level mode as a waveform mode for the

periodic interrupt function.

*2) This step is intended to set the CTFG bit to 0 in the control register 2 to

cancel an interrupt to the CPU.

8.4-2 Alarm Interrupt

WALE or DALE=0

*1

Set Alarm Minute, Hour,

and Day-of-week Registers

WALE or DALE=1

*2

*1) This step is intended to once disable the alarm interrupt circuit by setting

the WALE and DALE bits to 0 in anticipation of the coincidental occurrence

of a match between current time and preset alarm time in the process of

setting the alarm interrupt function.

*2) This step is intended to enable the alarm interrupt function after completion

of all alarm interrupt settings.

*3) This step is intended to once cancel the alarm interrupt function by writing

the settings of “×,1,×,1,×,1,0,1” and “×,1,×,1,×,1,1,0” to the Alarm_W

registers and the Alarm_D registers, respectively.

Generate Interrupt to CPU

WAFG or DAFG=1?

YES

Conduct Alarm Interrupt

NO

Other Interrupt

Processes

Write “×,1,×,1,×,1,0,1”

to Control Register 2

*3

49

Share Link: