MC74VHC86D Просмотр технического описания (PDF) - Motorola => Freescale
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MC74VHC86D Datasheet PDF : 5 Pages
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input XOR Gate
The MC74VHC86 is an advanced high speed CMOS 2–input Exclu-
sive–OR gate fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer output
which provides high noise immunity and stable output. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.
• High Speed: tPD = 4.8ns (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 2µA (Max) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
• Low Noise: VOLP = 0.8V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 56 FETs or 14 Equivalent Gates
1
A1
2
B1
4
A2
5
B2
9
A3
10
B3
12
A4
13
B4
LOGIC DIAGRAM
3
Y1
6
Y2
ę 8 Y = A B
Y3
11
Y4
Pinout: 14–Lead Packages (Top View)
VCC B4 A4 Y4 B3 A3 Y3
14 13 12 11 10 9 8
MC74VHC86
D SUFFIX
14–LEAD SOIC PACKAGE
CASE 751A–03
DT SUFFIX
14–LEAD TSSOP PACKAGE
CASE 948G–01
M SUFFIX
14–LEAD SOIC EIAJ PACKAGE
CASE 965–01
ORDERING INFORMATION
MC74VHCXXD
MC74VHCXXDT
MC74VHCXXM
SOIC
TSSOP
SOIC EIAJ
FUNCTION TABLE
Inputs
A
B
L
L
L
H
H
L
H
H
Output
Y
L
H
H
L
1234567
A1 B1 Y1 A2 B2 Y2 GND
6/97
© Motorola, Inc. 1997
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