5962-8964401PA(2001) Просмотр технического описания (PDF) - Analog Devices
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5962-8964401PA Datasheet PDF : 16 Pages
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Applications–AD844
Noise
Noise sources can be modeled in a manner similar to the dc bias
currents, but the noise sources are INN, INP, VN, and the amplifier
induced noise at the output, VON, is:
VON =
(( Inp
RP
)2
+
Vn
2
)1
+
R1 2
R2
+ (Inn
R1)2
Overall noise can be reduced by keeping all resistor values to a
minimum. With typical numbers, R1 = R2 = 1 kΩ, RP = 0,
Vn = 2 nV/√Hz, Inp = 10 pA/√Hz, Inn = 12 pA/√Hz, VON
calculates to 12 nV/√Hz. The current noise is dominant in
this case, as it will be in most low gain applications.
Video Cable Driver Using ؎5 Volt Supplies
The AD844 can be used to drive low impedance cables. Using
± 5 V supplies, a 100 Ω load can be driven to ± 2.5 V with low
distortion. Figure 11a shows an illustrative application which
provides a noninverting gain of 2, allowing the cable to be
reverse-terminated while delivering an overall gain of +1 to the
load. The –3 dB bandwidth of this circuit is typically 30 MHz.
Figure 11b shows a differential gain and phase test setup. In
video applications, differential-phase and differential-gain
characteristics are often important. Figure 11c shows the varia-
tion in phase as the load voltage varies. Figure 11d shows the
gain variation.
VIN
50⍀
+5V
2.2F
3
7
6
2
4
50⍀ ZO = 50⍀
RL VOUT
2.2F
50⍀
300⍀
–5V
300⍀
Figure 11a. The AD844 as a Cable Driver
HP8753A
NETWORK
ANALYZER
RF OUT
R
EXT
TRIG
SYNC OUT
IN
HP11850C
OUT SPLITTER
50⍀ OUT
(TERMINATOR)
OUT
VIN
CIRCUIT
VIN
UNDER
TEST
470⍀
VOUT
HP3314A
STAIRCASE
OUT
GENERATOR
Figure 11b. Differential Gain/Phase Test Setup Figure
0.3
IRE = 7.14mV
0.2
0.1
0
–0.1
–0.2
–0.3
0
18
36
54
72
90
VOUT – IRE
Figure 11c. Differential Phase for the Circuit of Figure 11a
0.06
IRE = 7.14mV
0.04
0.02
0
–0.02
–0.04
–0.06
0
18
36
54
72
90
VOUT – IRE
Figure 11d. Differential Gain for the Circuit of Figure 11a
High Speed DAC Buffer
The AD844 performs very well in applications requiring
current-to-voltage conversion. Figure 12 shows connections for
use with the AD568 current output DAC. In this application the
bipolar offset is used so that the full-scale current is ± 5.12 mA,
which generates an output of ± 5.12 V usingdecoupling and
grounding techniques to achieve the full 12-bit accuracy and
realize the fast settling capabilities of the system. The unmarked
capacitors in this figure are 0.1 µF ceramic (for the 1 kΩ appli-
cation resistor on the AD568. Figure 13 shows the full-scale
transient response. Care is needed in power supply example,
AVX Type SR305C104KAA), and the ferrite inductors should
be about 2.5 µH (for example, Fair-Rite Type 2743002122).
The AD568 data sheet should be consulted for more complete
details about its use.
REV. D
–11–
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