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M74HCT564

OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT INVERTING

STMicroelectronics 

M74HCT564

OCTAL D-TYPE FLIP FLOP

WITH 3 STATE OUTPUT INVERTING

s HIGH SPEED:

fMAX = 50MHz (TYP.) at VCC = 4.5V

s LOW POWER DISSIPATION:

ICC = 4µA(MAX.) at TA=25°C

s COMPATIBLE WITH TTL OUTPUTS :

VIH = 2V (MIN.) VIL = 0.8V (MAX)

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 6mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 564

DESCRIPTION

The M74HCT564 is an high speed CMOS OCTAL

D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS

INVERTING fabricated with silicon gate C2MOS

technology.

This 8 bit D-TYPE FLIP FLOP is controlled by a

clock input (CK) and an output enable input (OE).

On the positive transition of the clock, the Q

outputs will be set to the logic state that were

setup at the D inputs complements.

While the OE input is at low level, the eight outputs

will be in a normal logic state (high or low logic

DIP

SOP

TSSOP

ORDER CODES

PACKAGE

TUBE

T&R

DIP

SOP

TSSOP

M74HCT564B1R

M74HCT564M1R M74HCT564RM13TR

M74HCT564TTR

level) and while high level the outputs will be in a

high impedance state.

The output control does not affect the internal

operation of flip-flops; that is, the old data can be

retained or the new data can be entered even

while the outputs are off.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

August 2001

1/11

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