74ABT841 Просмотр технического описания (PDF) - NXP Semiconductors.
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74ABT841 Datasheet PDF : 15 Pages
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NXP Semiconductors
11. Waveforms
74ABT841
10-bit bus interface latch; 3-state
VI
Dn
GND
VOH
Qn
VOL
VM
tPLH
VM
VM
tPHL
VM
001aae916
Fig 5.
VM = 1.5 V
VOL and VOH are typical voltage output levels that occur with the output load.
Propagation delay for data to output
VI
LE
GND
VOH
Qn
VOL
VM
tWH
tPHL
VM
tWL
VM
VM
tPLH
VM
001aae914
Fig 6.
VM = 1.5 V
VOL and VOH are typical voltage output levels that occur with the output load.
Propagation delay, latch enable input to output and enable pulse width
VI
OE input
GND
3.5 V
output
LOW-to-OFF
OFF-to-LOW
VOL
VOH
output
HIGH-to-OFF
OFF-to-HIGH
GND
VM
tPLZ
tPZL
tPHZ
VOL + 0.3 V
VOH − 0.3 V
VM
tPZH
VM
outputs
enabled
outputs
disabled
outputs
enabled
001aal299
Fig 7.
VM = 1.5 V
VOL and VOH are typical voltage output levels that occur with the output load.
3-state output (Qn) enable and disable times
74ABT841
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 7 November 2011
© NXP B.V. 2011. All rights reserved.
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