IDT7280L12PA8 Просмотр технического описания (PDF) - Integrated Device Technology

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IDT7280L12PA8

CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9, DUAL 1,024 x 9, DUAL 2,048 x 9, DUAL 4,096 x 9, DUAL 8,192 x 9

Integrated Device Technology 

IDT7280/7281/7282/7283/7284/7285 5V ASYNCHRONOUS FIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

COMMERCIAL TEMPERATURE RANGE

LAST READ

IGNORED

READ

FIRST WRITE

ADDITIONAL

WRITES

FIRST

READ

W

R

EF

DATA OUT

tREF

tWEF

tA

VALID

Figure 5. Empty Flag From Last Read to First Write

VALID

3208 drw 07

RT

W,R

HF, EF, FF

tRTC

tRT

tRTS

tRTF

Figure 6. Retransmit

tRTR

FLAG VALID

3208 drw 08

W

tWEF

EF

tRPE

R

3208 drw 09

Figure 7. Minimum Timing for an Empty Flag Coincident Read Pulse

R

tRFF

FF

tWPF

W

3208 drw 10

Figure 8. Minimum Timing for a Full Flag Coincident Write Pulse

6

JUNE 29, 2012

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