IDT7280L15PAGI Просмотр технического описания (PDF) - Integrated Device Technology

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IDT7280L15PAGI

CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9, DUAL 1,024 x 9, DUAL 2,048 x 9, DUAL 4,096 x 9, DUAL 8,192 x 9

Integrated Device Technology 

IDT7280/7281/7282/7283/7284/7285 5V ASYNCHRONOUS FIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

tRSC

tRS

RS

tRSS

W

tRSS

R

tEFL

EF

HF, FF

tHFH , tFFH

NOTES:

1. EF, FF, HF may change status during Reset, but flags will be valid at tRSC.

2. W and R = VIH around the rising edge of RS.

Figure 2. Reset

COMMERCIAL TEMPERATURE RANGE

tRSR

3208 drw 04

R

Q0-Q8

W

D0-D8

t RC

tA

tRR

t RPW

tA

t RLZ

t WPW

t DV

DATA OUT VALID

t WC

t WR

t RHZ

DATA OUT VALID

t DS

t DH

DATA IN VALID

DATA IN VALID

Figure 3. Asynchronous Write and Read Operation

3208 drw 05

LAST WRITE

IGNORED

WRITE

FIRST READ

ADDITIONAL FIRST

READS

WRITE

R

W

tWFF

FF

tRFF

Figure 4. Full Flag From Last Write to First Read

5

3208 drw 06

JUNE 29, 2012

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