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548G-05C Просмотр технического описания (PDF) - Integrated Circuit Systems

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548G-05C
ICST
Integrated Circuit Systems ICST
548G-05C Datasheet PDF : 6 Pages
1 2 3 4 5 6
ICS548-05C
T1/E1 Clock Multiplier
Description
The ICS548-05C is a low-cost, low-jitter,
high-performace clock synthesizer designed to
produce x16 and x24 clocks from T1 and E1
frequencies. Using ICS’ patented analog/digital Phase-
Locked Loop (PLL) techniques, the device uses a
crystal or clock input to synthesize popular
communications frequencies. Power down modes allow
the chip to turn off completely, or the PLL and clock
output to be turned off separately.
ICS manuafactures the largest variety of
communications clock synthesizers for all applications.
Consult ICS to eliminate VCXO’s, crystals, and
oscillators from your board.
Features
Packaged in 16-pin TSSOP
Ideal for telecom/datacom chips
Replaces oscillators
3.3 V or 5 V operation
Uses a crystal or clock input
Produces 24.704, 37.056, 32.768, or 49.152 MHz
Includes Power-down features
Advanced, low-power, sub-micron CMOS process
See also the MK2049-34 for generating
Industrial temperature range available
Block Diagram
MSEL
REFEN
PDCLK
1.544 MHz or
2.048 MHz
clock or crystal
input
X1/ICLK
X2
Input
Buffer/
Crystal
Oscillator
Optional crystal
capacitors
X16 or x24
PLL/Clock
Synthesis
Circuitry
CLK
REFOUT
MDS 548-05C B
1
Revision 072704
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com

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