ICS650-01B Просмотр технического описания (PDF) - Integrated Circuit Systems
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ICS650-01B Datasheet PDF : 4 Pages
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ICS650-01B
System Peripheral Clock Source
Pin Assignment
BSEL 1
20 PSEL1
X2 2
19 PSEL0
X1 3
18 PCLK2
VDD 4
17 PCLK3
GND 5
16 VDD
GND 6
BCLK1 7
15 ASEL
14 GND
BCLK2 8
13 14.318M
ACLK 9
12 PCLK1
PCLK4 10
11 OE
20 pin (150 mil) SSOP
Processor Clock (MHz)
PSEL1
0
0
0
M
M
M
1
1
PSEL0
0
M
1
0
M
1
0
M
PCLK1
25.00
TEST
TEST
40.00
33.3334
20.00
20.00
20.00
PCLK2,3
50.00
TEST
TEST
80.00
66.6667
40.00
33.3334
66.6667
PCLK4
18.75
TEST
TEST
20.00
25.00
25.00
25.00
25.00
1
1 Stops low all clocks except BCLK2.
B Clocks (MHz)
Audio Clock (MHz)
BSEL
0
M
1
BCLK1
3.688
50
80
BCLK2
4.917
25
40
ASEL
0
M
1
ACLK
49.152
24.576
12.288
0 = connect directly to ground, 1 = connect directly
to VDD, M=leave unconnected (floating)
Pin Descriptions
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
BSEL
X2
X1
VDD
GND
GND
BCLK1
BCLK2
ACLK
PCLK4
OE
PCLK1
14.318M
GND
ASEL
VDD
PCLK3
PCLK2
PSEL0
PSEL1
Type
I
XO
XI
P
P
P
O
O
O
O
I
O
O
P
I
P
O
O
I
I
Description
BCLK1 and BCLK2 Select pin. Determines frequency of B clocks per table above.
Crystal connection. Connect to parallel mode 14.31818 MHz crystal. Leave open for clock.
Crystal connection. Connect to parallel mode 14.31818 MHz crystal, or clock.
Connect to VDD. Must be same value as other VDD. Decouple with pin 6.
Connect to ground.
Connect to ground.
BCLK1 output. Determined by BSEL pin per table above.
BCLK2 output. Determined by BSEL pin per table above. Only clock active if PSEL1, 0=1.
AC97 Audio clock output per table above.
PCLK output number 4 per table above.
Output Enable. Tri-states all outputs when low.
PCLK output number 1 per table above.
14.31818 MHz buffered reference clock output.
Connect to ground.
ACLK Select pin. Determines frequency of Audio clock per table above.
Connect to VDD. Must be same value as other VDD. Decouple with pin 14.
PCLK output number 3 per table above.
PCLK output number 2 per table above.
Processor Select pin #0. Determines frequencies on PCLKs 1-4 per table above.
Processor Select pin #1. Determines frequencies on PCLKs 1-4 per table above.
Key: I = Input; XO/XI = crystal connections; O = output; P = power supply connection
MDS 650-01B A
2
Revision 041499
Printed 11/15/00
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax
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