AD8191A Просмотр технического описания (PDF) - Analog Devices

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AD8191A

4:1 HDMI/DVI Switch with Equalization

Analog Devices 

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter

AVCC to AVEE

DVCC to DVEE

DVEE to AVEE

VTTI

VTTO

AMUXVCC

Internal Power Dissipation

High Speed Input Voltage

High Speed Differential Input Voltage

Low Speed Input Voltage

I2C® and Parallel Logic Input Voltage

Storage Temperature Range

Operating Temperature Range

Junction Temperature

Rating

3.7 V

3.7 V

±0.3 V

AVCC + 0.6 V

AVCC + 0.6 V

5.5 V

2.2 W

AVCC − 1.4 V < VIN <

AVCC + 0.6 V

2.0 V

DVEE − 0.3 V < VIN <

AMUXVCC + 0.6 V

DVEE − 0.3 V < VIN <

DVCC + 0.6 V

−65°C to +125°C

−40°C to +85°C

150°C

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

AD8191A

THERMAL RESISTANCE

θJA is specified for the worst-case conditions: a device soldered

in a 4-layer JEDEC circuit board for surface-mount packages.

θJC is specified for no airflow.

Table 3. Thermal Resistance

Package Type

θJA

θJC

Unit

100-Lead LQFP

56

19

°C/W

MAXIMUM POWER DISSIPATION

The maximum power that can be safely dissipated by the

AD8191A is limited by the associated rise in junction

temperature. The maximum safe junction temperature for

plastic encapsulated devices is determined by the glass

transition temperature of the plastic, approximately 150°C.

Temporarily exceeding this limit may cause a shift in

parametric performance due to a change in the stresses exerted

on the die by the package.

Exceeding a junction temperature of 175°C for an extended

period can result in device failure. To ensure proper operation, it is

necessary to observe the maximum power rating as determined by

the coefficients in Table 3.

ESD CAUTION

Rev. 0 | Page 5 of 28

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