74HC4040 Просмотр технического описания (PDF) - NXP Semiconductors.
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74HC4040 Datasheet PDF : 20 Pages
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NXP Semiconductors
74HC4040; 74HCT4040
12-stage binary ripple counter
7.2 Timing diagram
CP input
MR input
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Fig 7. Timing diagram
1 2 4 8 16 32 64 128 256 512 1024 2048 4096
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8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
DIP16 package
VI < 0.5 V or VI > VCC + 0.5 V
VI < 0.5 V or VI > VCC + 0.5 V
0.5 V < VO < VCC + 0.5 V
Tamb = 40 C to +125 C
0.5
-
-
-
-
-
65
[1]
-
+7
V
20 mA
20 mA
25 mA
50 mA
50 mA
+150 C
750 mW
SO16, SSOP16, TSSOP16 and
DHVQFN16 packages
-
500 mW
[1] For DIP16 packages: above 70 C, Ptot derates linearly with 12 mW/K.
For SO16, SSOP16, TSSOP16 and DHVQFN16 packages, above 70 C, Ptot derates linearly with 8 mW/K.
74HC_HCT4040
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 20 March 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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