CY7C056V-15AI_11 Просмотр технического описания (PDF) - Cypress Semiconductor

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производитель

CY7C056V-15AI_11

3.3 V 16K/32K x 36 FLEx36™ Asynchronous Dual-Port Static RAM

Cypress Semiconductor 

CY7C056V

CY7C057V

Contents

Pin Configurations ........................................................... 4

Pin Configurations ........................................................... 5

Selection Guide ................................................................ 5

Pin Definitions .................................................................. 6

Maximum Ratings............................................................. 7

Operating Range ............................................................... 7

Electrical Characteristics.................................................. 8

Capacitance ...................................................................... 8

AC Test Load and Waveforms ......................................... 9

Switching Characteristics .............................................. 10

Data Retention Mode ...................................................... 11

Timing .............................................................................. 11

Read Cycle No. 1 (Either Port Address Access) ........ 12

Read Cycle No. 2 (Either Port CE/OE Access) .......... 12

Read Cycle No. 3 (Either Port)................................... 12

Switching Waveforms .................................................... 12

Write Cycle No. 1: R/W Controlled Timing ................. 13

Write Cycle No. 2: CE Controlled Timing ................... 13

Semaphore Read After Write Timing, Either Side...... 14

Timing Diagram of Semaphore Contention ................ 14

Timing Diagram of Write with BUSY (M/S = HIGH).... 15

Write Timing with Busy Input (M/S = LOW) ............... 15

Busy Timing Diagram No. 1 (CE Arbitration).............. 16

Busy Timing Diagram No. 2 (Address Arbitration) ..... 16

Architecture .................................................................... 18

Functional Description ................................................... 18

Write Operation ......................................................... 18

Read Operation ......................................................... 18

Interrupts ................................................................... 18

Busy .......................................................................... 18

Master/Slave ............................................................. 18

Semaphore Operation ............................................... 18

Right Port Configuration................................................. 20

Right Port Operation ...................................................... 20

Left Port Operation ......................................................... 20

Bus Match Operation ..................................................... 20

Long-Word (36-bit) Operation ................................... 21

Word (18-bit) Operation ............................................. 21

Byte (9-bit) Operation ................................................ 21

Ordering Information ...................................................... 22

Ordering Code Definition ........................................... 22

Package Diagrams .......................................................... 23

Acronyms ........................................................................ 24

Document Conventions ................................................. 24

Units of Measure ....................................................... 24

Sales, Solutions, and Legal Information ...................... 26

Worldwide Sales and Design Support ....................... 26

Products .................................................................... 26

PSoC Solutions ......................................................... 26

Document #: 38-06055 Rev. *E

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