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AT25P1024(2001) Просмотр технического описания (PDF) - Atmel Corporation

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AT25P1024
(Rev.:2001)
Atmel
Atmel Corporation Atmel
AT25P1024 Datasheet PDF : 14 Pages
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The AT25P1024 is enabled through the Chip Select pin
(CS) and accessed via a 3-wire interface consisting of
Serial Data Input (SI), Serial Data Output (SO), and Serial
Clock (SCK). All programming cycles are completely self-
timed, and no separate ERASE cycle is required before
WRITE.
BLOCK WRITE protection is enabled by programming the
status register with top ¼, top ½ or entire array of write pro-
tection. Separate program enable and program disable
instructions are provided for additional data protection.
Hardware data protection is provided via the WP pin to pro-
tect against inadvertent write attempts to the status regis-
ter. The HOLD pin may be used to suspend any serial
communication without resetting the serial sequence.
Absolute Maximum Ratings*
Operating Temperature.................................. -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground .....................................-1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under Absolute
Maximum Ratingsmay cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
Block Diagram
131,072 x 8
2
AT25P1024

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