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AT25P1024(2001) Просмотр технического описания (PDF) - Atmel Corporation

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AT25P1024
(Rev.:2001)
Atmel
Atmel Corporation Atmel
AT25P1024 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Features
Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
2.1 MHz Clock Rate
128-byte Page Mode Only for Write Operations
Low-voltage and Standard-voltage Operation
– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 3.6V)
Block Write Protection
– Protect 1/4, 1/2, or Entire Array
Write Protect (WP) Pin and Write Disable Instructions for
Both Hardware and Software Data Protection
Self-Timed Write Cycle (5 ms Typical)
High Reliability
– Endurance: 100,000 Write Cycles
– Data Retention: >40 Years
– ESD Protection: >3000V
20-lead JEDEC SOIC and 8-pad Leadless Array Package
Description
The AT25P1024 provides 1,048,576 bits of serial electrically erasable programmable
read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device
is optimized for use in many industrial and commercial applications where low power
and low voltage operation are essential. The AT25P1024 is available in space saving
20-lead JEDEC SOIC and 8-pad LAP packages.
Pin Configurations
(continued)
Pin Name
CS
SCK
SI
SO
GND
VCC
WP
HOLD
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Write Protect
Suspends Serial Input
20-lead SOIC
CS 1
SO 2
NC 3
NC 4
NC 5
NC 6
NC 7
NC 8
WP 9
GND 10
20 VCC
19 HOLD
18 NC
17 NC
16 NC
15 NC
14 NC
13 NC
12 SCK
11 SI
NC
No Connect
8-pad Leadless Array
VCC 8
HOLD 7
SCK 6
SI 5
1 CS
2 SO
3 WP
4 GND
Bottom View
SPI Serial
EEPROMs
1M (131,072 x 8)
AT25P1024
Rev. 1082E–06/01
1

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