74LVTH16652MEAX Просмотр технического описания (PDF) - Fairchild Semiconductor

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74LVTH16652MEAX

Low Voltage 16-Bit Transceiver/Register with 3-STATE Outputs

Fairchild Semiconductor 

Connection Diagram

Pin Descriptions

Pin Names

A0–A15

B0–B15

CPABn, CPBAn

SABn, SBAn

OEABn, OEBAn

Description

Data Register A Inputs/

3-STATE Outputs

Data Register B Inputs/

3-STATE Outputs

Clock Pulse Inputs

Select Inputs

Output Enable Inputs

Truth Table (Note 1)

Inputs

Inputs/Outputs

Operating Mode

OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 A0 thru A7 B0 thru B7

L

H H or L H or L X

X Input

Input

Isolation

L

H  X

X

Store A and B Data

X

H

 H or L X

X Input

Not Specified Store A, Hold B

H

H  X

X Input

Output

Store A in Both Registers

L

 X H or L

X

X Not Specified Input

Hold A, Store B

L

L



X

X Output

Input

Store B in Both Registers

L

L

X

X

X

L Output

Input

Real-Time B Data to A Bus

L

L

X H or L X

H

Store B Data to A Bus

H

H

X

X

L

X Input

Output

Real-Time A Data to B Bus

H

H H or L X

H

X

Stored A Data to B Bus

H

L H or L H or L H

H Output

Output

Stored A Data to B Bus and

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Stored B Data to A Bus

 = LOW-to-HIGH Clock Transition

Note 1: The data output functions may be enabled or disabled by various signals at OEAB or OEBA inputs. Data input functions are always enabled, i.e.,

data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs. This also applies to data I/O (A and B: 8–15) and #2 control pins

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2

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